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L
No, they meant actually the same die. You can see here:
"SoC/ IOE 100% reuse from MTL"
Mar 30, 2024
L
Another thing of interest, Intel was meant to benefit from the chiplet design, by reusing SoC and IO tiles from Meteor lake in Arrow...
Mar 30, 2024
L
You mean that PowerVia is optional? Can a customer create a 18A chip without it?
Mar 12, 2024
L
https://spie.org/advanced-lithography/presentation/High-power-EUV-light-sources-500w-for-high-throughput-in/12953-43#_=_
EUV...
Mar 11, 2024
L
at end of 2023 the graph show about 5% for 20A. Do they need 5% of total capacity just for development?
Mar 1, 2024
L
Well, there's clearly a green band showing 20A production from 2023. Maybe it's just that the graph isn't accurate
Mar 1, 2024
L
That chart is very interesting. It shows 20A/18A in production right now, even though 20A products only are released around end of 2024...
Feb 29, 2024
L
If Apple make cars like they make mice, I don't want one. There would be just one big button that controls everything.
Feb 28, 2024
L
I'm just thinking, if N3P is "comparable" to Intel 18A and available earlier and cheaper, does that mean we are going to see a bigger...
Feb 26, 2024
L
The argument about who is right about whether 18A or N3P is better misses the point, which is that there's not always a single "better"...
Feb 26, 2024
L
I guess they don't refer to it as N3B, but everyone else seems to call it that
Feb 26, 2024
L
Maybe, it's a mistake?
N3B stands Base N3 node, N3E is Enhanced N3 node: https://fuse.wikichip.org/news/7375/tsmc-n3-and-challenges-ahead/
Feb 25, 2024
L
He said Arrow Lake CPU tile would use N3B.
Feb 25, 2024
L
Yes. That detail was also leaked by Moore's law is dead.
Feb 25, 2024
L
In a quote from the original article Gelsinger says that Arrow lake will be 100% TSMC, including the CPU tile:
This seems to contradict...
Feb 25, 2024