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Recent content by cliff

  1. C

    Gelsinger 5 Nodes in 4 years; Success or Failure?

    C'mon guys. How many of you actually have taped out on time... and you aren't fighting physics. Ever hear of the Pi factor? I use this multiplier on my software developers. It is accurate to 1.7%.
  2. C

    Commerce Secretary Raimondo: U.S. set to become a major hub of leading-edge logic chip manufacturing

    Gina, you are correct. 14nm is an advanced process. A double patterned process that uses FinFETs (low leakage) with 13 copper routing layers, routable contacts, and diffusion cuts would certainly satisfy most of US needs, even for the DoD.
  3. C

    Nvidia to become chip design powerhouse?

    It is time for @blueone to come out of retirement
  4. C

    GlobalFoundries downgraded by Citi amid competition - downturn concerns

    Based on the LV stdcells, but I can start saying 12nm if it reduces controversy It takes a lot of work (as you know) to create the correct pitch to use for our layout automation, standard cells, and our policy to have as close to automatic process migration as possible. For example, our 180nm...
  5. C

    Nvidia to become chip design powerhouse?

    That is the reason why they have a design house. Get to work guys.
  6. C

    GlobalFoundries downgraded by Citi amid competition - downturn concerns

    poly length... sorry. typo. In my opinion (and other mixed signal circuit designers who I collaborate with), NRE, timelines, and access to a TRUSTED foundry is everything. Saving pennies on area doesn't matter. The goal is to get as much as you can onto silicon (not on the PC board) Sqeezing...
  7. C

    Is Nvidia using their chips to design their next generation chips?

    Absolutely. They better send their GDS2's (OASIS, whatever) layers to different mask shops. Are they allowed to put their own security guards at the foundry's back door.
  8. C

    Nvidia to become chip design powerhouse?

    I am not saying that Intel wants Nvidia as a customer. I am saying that Intel should compete against them!
  9. C

    GlobalFoundries downgraded by Citi amid competition - downturn concerns

    Sorry for the confusion. I call it 14nm because that is the drawn poly size. We should probably call it by the gate pitch and M2 pitch, but just use the old standard (poly pitch). I also call tsmc 12ffc "16nm" GF doesn't have to. The ecosystem around it will. Advanced packaging (Amkor, etc)...
  10. C

    GlobalFoundries downgraded by Citi amid competition - downturn concerns

    As far as 28nm... correct, a 28nm ASIC will blow away an FPGA. Note: Automation makes 28nm obsolete compared to 16-12nm. IanD made a good case for GF22, so we continue to support that.
  11. C

    GlobalFoundries downgraded by Citi amid competition - downturn concerns

    Mr. Blue: Of course FPGAs are popular and needed, but so are ASICs. Mr. Ng: Who is knocking 6nm? But why does every foundry need to be leading edge? If you aren't number 1, then you pack up and close? There are lots of customers that don't have $50M NRE budgets. Why is NXP, etc making chips on...
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