Analyzing Memory Bus to Meet with DDR Specifications

Online

Part of Simulating for High-Speed Digital Insights series April 14, 2022 | 10:00 AM PT / 1:00 PM ET Due to ever increasing data demand, the speed grade for memory is now in the multi-gigabit range. Memory bus design becomes a lot more complicated with tighter design margins due to higher crosstalk between vias and traces along …

Generating AMI Models for SerDes Applications

Online

Part of Keysight's 'Simulating for High-Speed Digital Insights' webinar series July 14, 2022 | 10:00 AM PT / 1:00 PM ET AMI (Algorithmic Modeling Interface) has become the industry standard for modeling and simulating SerDes transmitter and receiver behaviors. It includes equalization, and CDR (Clock Data Recovery) used for PCIe, USB, and Ethernet applications. It also helps …

Creating Reliable Memory Interfaces Fast and Easy

This course will be held Online

Part of Keysight's 'Simulating for High-Speed Digital Insights' webinar series October 13, 2022 | 10:00 AM PT / 1:00 PM ET Successful memory interface design is more than building and simulating one design that works to the given specification. As a designer, your success relies on making a robust implementation that works for different corner cases, process variations, BOM …

Perform Simulation-based compliance Tests for (LP)DDR

Online

Part of Keysight's 'Simulating for High-Speed Digital Insights' webinar series November 15, 2022 | 10:00 AM PT / 1:00 PM ET Moving to the latest memory standards introduces new compliance testing procedures. As design margins shrink, it becomes ever more important to quantify that your implementation is compliant to specifications, before you build. In this webinar, we …

Online Panel: What is the Best Beamsteering Antenna Array and Repeater Technologies for 5G mmWave?

Online

Sponsored by: Anokiwave, Keysight Technologies and Analog Devices Panel Participants: Eric Higham (Microwave Journal® - moderator), Pete Moosbrugger (Anokiwave), Murthy Upmaka (Keysight Technologies) and John Kilpatrick (Analog Devices) Event Duration: 75 minutes Abstract: This panel will discuss the various RF architectures and antenna technologies being developed to produce and test low-cost mmWave beam steering arrays for 5G applications including …