Overview After years of steady SoC and ASIC aggregation packing functionality into a large single die, the semiconductor industry can no longer meet growing performance demands. In the face of power, performance, and area constraints and reticle limits, and with the cost of production at advanced nodes skyrocketing, there is renewed interest in a disaggregated …
Overview For analog IC designers, the most important capability is rapid simulation of an accurate model of their circuits. Early in the design process, they explore architectures and novel approaches and need an agile simulation flow that gives them confidence that the implemented design is capable of meeting the system specs. As the design matures, …
Continue reading "What’s the Recipe for Efficient Analog IC Design and Verification?"
Presenter: Boris Murmann Description Abstract: Inspired by the possibilities of open-source chip design, the IEEE Solid-State Circuits Society (SSCS) launched its new Platform for IC Design Outreach (PICO) in the summer of 2021. With this program, the SSCS intends to contribute to the new open source movement, forge connections with the fast-growing open source community …
Continue reading "Webinar: Democratizing IC Design: The IEEE SSCS PICO Program"
Synopsys Webinar | Wednesday, May 10, 2023 | 10:00 a.m. PDT Wireless devices are ubiquitous, all requiring RF ICs to transmit and receive radio waves via antennas. The radio range …
Date: Thursday, May 16, 2024 Venue: Holiday Inn Munich - City Centre Location: Hochstrasse 3, Munich, 81669 Germany Parking: On-site parking for €20 per day. You will receive further information in your registration confirmation email. Analog, RF, and Mixed-Signal IC Design Learn how the latest developments within Virtuoso Studio and Spectre platforms can significantly improve your design productivity and make …
Continue reading "CadenceCONNECT: Tech Days Europe 2024 – Munich"
Date: Tuesday, May 21, 2024 Venue: H2C Hotel Milanofiori Location: Via Roggia Bartolomea, 5, 20057 Assago MI, Italy Parking: There is a car park on-site that is free of charge. Spaces cannot be guaranteed as it is used by all hotel guests. You will receive further information in your registration confirmation email. Analog, RF, and Mixed-Signal IC Design Learn …
Continue reading "CadenceCONNECT: Tech Days Europe 2024 – Milan"
Webinar Content Analog/mixed-signal IC design is a critical challenge for ASIC development with tight specifications and ambitious tapeout schedules that are not easy to meet. Many manual design steps from architecture through layout verification limit the amount of early insights and force time-consuming design iterations. In this webinar, we will give you an insight into …
