ANSYS Fluent Multiphase Update: Streamlined Setup and AIAD Regime Transition Model

March 17, 2020 11:00 AM - 12:00 PM (EST) Venue: Online ANSYS Fluent provides the widest range of multiphase models to accurately simulate your toughest challenges. Learn about recent innovations, including: A streamlined workflow that makes it simple to set up complex multiphase simulations faster, with confidence An innovative AIAD model to accurately simulate complex …

Improving Spacecraft Fuel Tank Design: Reducing Sloshing in Rockets

March 17, 2020 11:00 AM (EDT) Venue: Online Several commercial space launch systems have been developed recently that use powerful and reusable liquid-fueled rockets, requiring engineers to understand how to extend the lifespan of reusable rocket stages. Structural fatigue and failure of these reusable stages is caused by sloshing of the liquid fuel and oxidizer …

Six Automated Steps to Design Partitioning for Multi-FPGA Prototyping Boards

Tue, Mar 17, 2020 11:00 AM - 12:00 PM MDT ** Work email address required** ABSTRACT Presently, emulation and FPGA-based prototyping are essential verification and validation techniques for a SoC, ASIC designs and become irreplaceable in pre-silicon verification of Deep Learning Accelerator designs. Challenges of the multi-FPGA design setup like partitioning, multiplexing limited I/O interconnections …

SNUG Silicon Valley

March 18-19, 2020 Santa Clara Convention Center 5001 Great America Pkwy, Santa Clara, CA 95054 About SNUG Your Global Design Community Focused on Innovation The Synopsys Users Group (SNUG) was established in 1991 to provide users of Synopsys design tools and technology with an open forum in which they could exchange ideas, discuss problems and …

Engineering Design Transformation: Minimize Physical Prototypes & Speed Up Time-To-Market

March 18, 2020 11:30 AM (IST) Venue: Online With near-instant simulation capabilities and an extremely easy-to-use multiphysics interface, Ansys Discovery speeds up product design and development while reducing the number of physical prototypes needed. Through interactive design explorations, designers can now avoid unnecessary prototyping, hence saving time and money. Join us for this Ansys Webinar …

TAU 2020

ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems March 19 - 20, 2020 Monterey, California The ACM sponsored TAU series of workshops provide an informal forum for practitioners and researchers working on temporal aspects of digital systems to disseminate early work and engage in a free discussion of ideas. The twenty-seventh in …

WEBINAR: Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud

Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending …

Critical Embedded Systems and Software Development Solutions for Railways

March 19, 2020 11:00 AM (EDT) Venue: Online Whether you are designing critical software for rail interlocking systems and signaling, automatic train operation, computer-based train control, emergency braking systems, overspeed protection, train vacancy detection or other railway applications, you will need to leverage model-based development tools for high-reliability embedded on-board or wayside train control software, …

Debunking Myths of HPC, Cloud and Licensing

March 19, 2020 11:00 AM (EDT) Venue: Online According to a recent survey, 40% of engineers limit the size or amount of detail for every simulation model due to compute capacity and turnaround time constraints. Recognizing this, smaller and mid-sized companies now seek more affordable, accessible and powerful hardware, making high-performance computing (HPC) a necessity. …

Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud

Thu, Mar 19, 2020 11:00 AM - 12:00 PM MDT ** Work email address required** Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes and CPU cluster-based designs, Interlaken has found a unique spot …

AMUG 2020

Participate in the conference designed for users, by users. Get ready for the biggest and best AMUG Conference ever. There will be more users at the event and more technologies represented. With AMUG’s expanded scope, expert, intermediate and novice users of all commercial additive manufacturing technologies are welcome. Join us from March 22-26, 2020, in Chicago, …