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ESDA Event: Power and Policy in California

ESDA Event: Power and Policy in California
by Bernard Murphy on 03-04-2017 at 7:00 am

Apparently this event is now being postponed until sometime later in the year. Stay tuned

We spend a lot of our time with our heads down in the technical details and when we look up at what we think is the big picture, it’s usually just a little bit bigger, often no more than a justification for immediate product directions. So wouldn’t it be interesting once in a while to look at the really bigpicture, to understand global energy objectives, how that drives power policy in the state of California and how that drives power regulation for electronic design?

REGISTER NOW for event on Thursday March 23[SUP]rd[/SUP], starting at 6pm

ESDA will host a panel on just this topic with an impressive line-up of speakers from the California Energy Commission and the Natural Resources Defense Council, Lip Bu (Cadence CEO) is on the panel, along with Shahid Sheikh from Intel, Vojin Zivojnovic from Aggios and Vic Kulkarni from Ansys. You’ll get to hear their views and there will a chance to network with speakers and other ESDA members.

If you’re getting a little burned out on the same old stories of why low power is important, here’s a rare opportunity to get a new and bigger perspective, and new material to refresh that aging pitch on the importance of low power. I plan to be there.

WHAT: The Electronic System Design Alliance will present an informational panel, “Energy Policy and Strategy for the IoT Era,” to outline the new rules for PCs set by the California Energy Commission (CEC). It will be moderated by Grant Pierce, chief executive officer (CEO) of Sonics, Inc. and chairman of the ESD Alliance board of directors.
WHEN: Thursday, March 23, beginning at 6 p.m. with networking, light snacks and drinks, concluding at 9 p.m.
WHERE: San Jose City Hall Rotunda. 200 East Santa Clara Street, San Jose, Calif.
The program will explain the CEC’s new energy efficiency rules and regulations for PCs and monitors, and give panelists a chance to provide their perspectives. A panel discussion and audience Q&A session will follow. Panelists include:
· Vojin Zivojnovic, founder and CEO of AGGIOS
· Dave Ashuckian, CEC’s deputy director of the Efficiency Division
· Pierre Delforge, director, High Tech Sector Energy Efficiency of the Natural Resources Defense Council (NRDC)
· Vic Kulkarni, ANSYS’ senior vice president and general manager of the RTL Power Business
· Shahid Sheikh, director in Government and Policy Group with Intel Corporation
· Lip-Bu Tan, Cadence’s president and CEO

Ashuckian and Delforge will explain how the rules came about and why they are necessary, how much energy they will save, when they will take effect and how they will be enforced. They will address what the rules mean for manufacturers and the supply chain and their implications for broader national and global energy efficiency standards for electronic products, particularly as it relates to the emerging IoT market.
Attendees will learn about potential new technical innovations in design and manufacturing, insights into energy efficiency and what impact the rules will have on their companies’ as well as industries’ energy policies and strategies. Panelists will attempt to determine how the new rules could affect the economy.
The panel is open free of charge to all ESD Alliance member companies. Non-members are welcome to attend for a fee of $40.


More articles by Bernard…

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