Tag: power

Webinar: Navigating the Power Challenges of Datacenter Infrastructure

Webinar: Navigating the Power Challenges of Datacenter Infrastructure
by Admin on 02-26-2024 at 7:32 pm

The surge in applications such as AI, HPC, and GPU-intensive workloads requires unparalleled performance, placing cloud vendors and enterprise datacenters under immense pressure to simultaneously maximize power efficiency, reduce costs, and adhere to stringent environmental standards.

Join us for a 1-hour panel discussion… Read More

Webinar: How to achieve 95%+ Accurate power measurement during architecture exploration?

Webinar: How to achieve 95%+ Accurate power measurement during architecture exploration?
by Admin on 10-31-2023 at 3:39 pm

Description

During the conceptualization and architectural exploration phases, it is crucial to assess the power budget.

Would you like to accurately measure the:

1. Power consumed for a proposed embedded software or firmware?

2. Savings of a Power Management Algorithm prior to development?

3. Power impact of hardware configuration… Read More

Webinar: RTL Power Optimization: Applying Best Practices to Overcome Low-Power Design Challenges

Webinar: RTL Power Optimization: Applying Best Practices to Overcome Low-Power Design Challenges
by Admin on 10-25-2023 at 2:43 pm

Designers face enormous challenges for low-power designs. Whether it is IoT at the edge, AI in the datacenter, robotics or ADAS, the demand for increased functionality in SoCs is rapidly outpacing the power budget. Power must be considered at every stage of chip design including performance, reliability and packaging. Waiting

… Read More
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Breakthrough Gains in RTL Productivity and Quality of Results with Cadence Joules RTL Design Studio

Breakthrough Gains in RTL Productivity and Quality of Results with Cadence Joules RTL Design Studio
by Kalar Rajendiran on 08-08-2023 at 10:00 am
Categories: AI, Cadence, EDA

Joules RTL Design Studio Benefits

Register Transfer Level (RTL) is a crucial and valuable concept in digital hardware design. Over the years, it has played a fundamental role in enabling design of complex digital chips. By abstracting away implementation details and providing a clear description of digital behavior, RTL has contributed significantly to the… Read More

Webinar: Mitigating Power Electronics Reliability Challenges in EVs

Webinar: Mitigating Power Electronics Reliability Challenges in EVs
by Admin on 08-07-2023 at 2:43 pm

Learn about the vital reliability challenges facing engineers working on power electronics within EVs and the physical testing and simulation solutions.

TIME:
AUGUST 10, 2023
11 AM EDT

Venue:
Virtual

About this Webinar

Electric vehicles (EV) create new demands for power electronics with wide band gap semiconductors and emerging

… Read More

Webinar: Power Integrity Challenges and Solutions for Interposer Design

Webinar: Power Integrity Challenges and Solutions for Interposer Design
by Admin on 05-01-2023 at 1:42 pm

Join us on May 17 for the latest 3D-IC webinar series, “Power Integrity Challenges and Solutions for Interposer Design.” The discussion will focus on interposer power analysis as an isolated case and in context with the dice instantiated in a 3D-IC device. The presentation will then explore the completed multi-chip design in

… Read More

CadenceTECHTALK: Integrated Thermal Analysis for RF MMIC and PCB Power Applications

CadenceTECHTALK: Integrated Thermal Analysis for RF MMIC and PCB Power Applications
by Admin on 01-16-2023 at 2:07 pm

Date: Tuesday, January 24, 2023

Time: 09:00 GMT / 10:00 CET / 11:00 EET & Israel / 14:30 IST

Join us for this one-hour CadenceTECHTALK to learn how the Cadence Celsius Thermal Solver uses design data such as layout geometries, material properties, and dissipated power simulation results from Microwave Office software to provide

… Read More

Ansys 2023 R1: Ansys Signal and Power Integrity What’s New

Ansys 2023 R1: Ansys Signal and Power Integrity What’s New
by Admin on 01-11-2023 at 4:15 pm

The 2023 R1 updates to Ansys SIwave and Ansys Q3D Extractor are geared towards simulating larger, more complex PCB designs faster and achieving better performance. Enhancements include a new nonlinear solver, RL and CG extraction improvements, and distributed computing implementations upgrades.

TIME:
MARCH 16, 2023
11 AM

… Read More

Webinar: Achieving Consistent RTL Power Analysis Accuracy

Webinar: Achieving Consistent RTL Power Analysis Accuracy
by Admin on 12-15-2022 at 3:56 pm

*Company email required for registration*

Register Transfer Level (RTL) power analysis, performed early in the design cycle, is a key component of end-to-end methodology to maximize energy efficiency. Such analysis has become a critical requirement for many IC designs today and in the future. Although RTL power analysis technology… Read More