Webinar: PCIe/CXL Latency and Power Considerations for HPC SoCs

Webinar: PCIe/CXL Latency and Power Considerations for HPC SoCs
by Admin on 12-15-2022 at 3:53 pm

*Company email required for registration*

If you are designing chips for high-performance computing (HPC) and data center applications, bandwidth is, of course, a key consideration. However, as data centers get bigger and the required compute power increases, keeping power consumption to a minimum becomes a priority. In

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2023 Signal & Power Integrity (SIPI) SIG

2023 Signal & Power Integrity (SIPI) SIG
by Admin on 12-15-2022 at 3:10 pm

What is SIPI SIG?

This event provides the opportunity for networking and proactive discussion with SIPI engineers to increase awareness of signal and power integrity issues within a forum for engaging dialog and education. Synopsys SIPI SIG is for Synopsys customers, and partners to update the audience about their offerings

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APEC (Applied Power Electronics Conference) 2023

APEC (Applied Power Electronics Conference) 2023
by Admin on 11-30-2022 at 12:57 pm

Join Us in Orlando!

We hope you will join us in Orlando, March 19-23, 2023 at the Orange County Convention Center!

The Applied Power Electronics Conference (APEC) focuses on the practical and applied aspects of the power electronics business. This is not just a designer’s conference; APEC has something of interest for

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IEEE Israel Electromagnetic Compatibility, Signal & Power Integrity Conference

IEEE Israel Electromagnetic Compatibility, Signal & Power Integrity Conference
by Admin on 11-30-2022 at 12:24 pm

IEEE EMC & SI PI CONFERENCE, ISRAEL 2022

We are excited to invite you to the 2022 IEEE Israel Electromagnetic Compatibility, Signal & Power Integrity Conference, the biggest EMC SI/PI event in Israel. Meet world-leading EMC, SI/PI and PCB designers and get to know the local community.

This is an excellent opportunity

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Quadric’s Chimera GPNPU IP Blends NPU and DSP to Create a New Category of Hybrid SoC Processor

Quadric’s Chimera GPNPU IP Blends NPU and DSP to Create a New Category of Hybrid SoC Processor
by Kalar Rajendiran on 11-01-2022 at 10:00 am

Memory Optimization Equals Power Minimization

Performance, Power and Area (PPA) are the commonly touted metrics in the semiconductor industry placing PPA among the most widely used acronyms relating to chip development. And rightly so as these three metrics greatly impact all electronic products that are developed. The degree of impact depends of course on the specific … Read More


Webinar: Integrated Thermal Analysis for RF MMIC and PCB Power Applications

Webinar: Integrated Thermal Analysis for RF MMIC and PCB Power Applications
by Admin on 08-29-2022 at 2:45 pm

Time: 9:00am – 10:00am (PT)

Join us for this one-hour CadenceTECHTALK to learn how the Cadence Celsius Thermal Solver uses design data such as layout geometries, material properties, and dissipated power simulation results from Microwave Office software to provide designers with thermal heat map visualization and

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2022 R2: What’s New in Ansys Signal & Power Integrity

2022 R2: What’s New in Ansys Signal & Power Integrity
by Admin on 06-28-2022 at 2:22 pm

Learn about the latest updates and newest functionality in Ansys Signal and Power Integrity. This webinar will describe the new features & capabilities of Ansys SIwave in detail, including new workflows for bending PCBs and creating encrypted 3D layouts.

Time:
August 9, 2022
11 am EST

Venue:
Virtual

About this Event

The 2022

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Arm and Cadence: Achieving Best Silicon Power, Performance, and Area

Arm and Cadence: Achieving Best Silicon Power, Performance, and Area
by Admin on 04-19-2022 at 4:13 pm

Join Cadence and Arm to learn how you can achieve the best power, performance, area (PPA) and time to tapeout for Arm® CPU implementation using the latest Cadence® Digital Full Flow. This event covers topics including high-performance design for the Arm Cortex®-A710 and other Arm processors, energy-efficient CPU implementation

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Design of Power Electronics and Motor Drive Systems with PSIM

Design of Power Electronics and Motor Drive Systems with PSIM
by Admin on 03-29-2022 at 4:00 pm

Free Webinar Series | April – October 2022

For many companies, the journey to product electrification and sustainable e-mobility solutions require completely transforming well-established design practices, acquiring non-core domain expertise, and integrating new design software within incumbent tech stacks.

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Path Based UPF Strategies Explained

Path Based UPF Strategies Explained
by Tom Simon on 03-29-2022 at 6:00 am

Path Based UPF Semantics

The development of the Unified Power Format (UPF) was spurred on by the need for explicit ways to enable specification and verification of power management aspects of SoC designs. The origins of UPF date back to its first release in 2007. Prior to that several vendors had their own methods of specifying power management aspects … Read More