Webinar: Boosting Analog IC Layout Productivity

Digital IC designers use a well-known methodology with pre-designed standard cells and other IP blocks playing a major re-use role, however in the analog IC design world there are more nuanced requirements which often dictate that a new analog block be highly customized. The downside is that customizing analog IC layout takes way too much time using traditional, manual efforts. Automation is highly desired for analog IC layout in order to reduce time to market, all while meeting custom specifications. There’s an REPLAY on this timely topic from Pulsic.

The big idea at Pulsic is that using their software tool called Animate, an analog IC layout designer can then speed up layout times by 60% over traditional, manual layout approaches. In the webinar you’ll see how the Pulsic approach starts within the traditional Virtuoso schematic environment, but with one additional window called Animate Preview activated.

The magic sauce at Pulsic is that their software analyzes the circuit topology from the Virtuoso schematic, identifies analog specific patterns like differential pairs and current mirrors, then automatically generates an IC layout while keeping track of analog IC layout issues like transistor grouping and transistor matching. From what I saw, these new concepts go way beyond earlier methodologies like Schematic Driven Layout (SDL), because there is more embedded intelligence going on with the Animate approach. No longer does the circuit designer have to meticulously mark-up and annotate the schematic with constraints about matching and pairing for the IC layout designer to interpret and hopefully implement correctly, as Animate does this inferencing under the hood.

The IC layout designer is the primary user of Animate, and with this new methodology they can get to a first layout quite rapidly, literally within seconds using their favorite editor, like Virtuoso Layout, seeing all of the sized transistors, Pcells and guard ring structures. High-level IC layout changes are best tweaked in the Animate tool, while low-level layout changes are best implemented in the traditional layout editor. Here’s an idea of how many high-level layout options you can simply choose from a selected set of transistors within Animate:

Another way to use Animate is to select schematic transistors and then add your own desired layout constraints, like how many rows each transistor implementation should occupy.

There’s even a floor plan editor in Animate, that allows an experienced layout designer to rapidly move groups of transistors at one time, achieving a more optimized layout with less interconnect congestion and better matching properties.

Summary

So, is analog IC layout 100% push-button automated like digital place and route? No, you still need to have an experienced layout designer operating automation tools like Animate from Pulsic, in order to achieve optimal, robust layouts, in record time. The REPLAY really gives you an idea of how this Animate methodology with higher-level layout operations complements detailed IC layout with traditional tools.

Related Blogs

• Obtaining Early Analog Block Area Estimates
• CEO Interview: Mark Williams of Pulsic
• Analog IC Layout Automation Benefits