[Original Language Korean]
Tesla is reportedly making a major change to its 'Dojo' supercomputing system supply chain, tapping both Samsung Electronics and Intel. Tesla is understood to be moving away from a structure where TSMC handled the entire process, instead pursuing a bifurcated approach where Samsung Electronics and Intel each take on specific processes. This is expected to bring significant changes to the supply chain. Samsung Foundry will manufacture the Dojo chips, while Intel will handle the specialized packaging technology for module production. For a long time, Samsung Electronics and Intel have been in a competitive relationship in the advanced foundry and packaging industries. However, with Tesla at the forefront, attention is now focused on whether a new cooperation structure and supply chain system will be formed in the AI semiconductor industry. According to an aggregation of G-Cnet Korea's reporting, Tesla is currently in talks with both companies to simultaneously utilize Samsung Electronics and Intel for the mass production of its third-generation Dojo.
Tesla Pursuing Samsung Foundry and Intel OSAT Utilization... "An Unprecedented Cooperation Structure"
Tesla has been developing its own Dojo supercomputing system to train AI models with data related to Full Self-Driving (FSD). Dojo integrates multiple of Tesla's custom AI semiconductors, the 'D-series' chips. For example, the first-generation Dojo is composed of a module with 25 D1 chips packaged together. It is known that TSMC, a major Taiwanese foundry, was solely responsible for the mass production of both Dojo 1 and 2. However, the supply chain is expected to be completely changed starting with Dojo 3. Tesla is currently understood to be pursuing a plan to have Samsung Electronics handle the front-end process for the 'D3' chips for Dojo 3, and Intel handle the packaging process for the modules. Multiple sources familiar with the matter explained, "Tesla is proposing a plan to separate chip mass production and module packaging in the Dojo 3 supply chain discussions," adding, "Based on this plan, specific contract agreements are being discussed with partners." If the contract is finalized, it will be the industry's first collaboration between Samsung Foundry and Intel OSAT (Outsourced Semiconductor Assembly and Test), led by Tesla. While both companies operate foundry and packaging businesses, no such official cooperation has been confirmed to date. First, Samsung Electronics' bid for the mass production of the Dojo 3 chips is considered to be virtually certain. Samsung Electronics previously signed a ₩22.76 trillion semiconductor consignment manufacturing contract with Tesla on the 28th of last month. At the time, Tesla CEO Elon Musk stated, "Samsung Electronics will be dedicated to the mass production of AI6 chips at its new foundry fab in the United States." AI6 is a semiconductor that can be used for Tesla's next-generation FSD, robots, and data centers, and is known to be based on a 2-nanometer process. Furthermore, Tesla has stated that it will not design a separate chip for Dojo 3 but will integrate the AI6 and Dojo 3 chips into a single architecture. In the second-quarter earnings conference call, CEO Elon Musk said, "We are considering a direction to basically use the same chip for Dojo 3 and AI6," adding, "For example, using two chips for cars or humanoids, and 512 for servers."
Dojo Requires Specialized Packaging for Ultra-Large Semiconductors
The analysis suggests that both technology and supply chain factors are behind Tesla's move to bifurcate the chip and packaging partners for Dojo 3. Unlike typical system semiconductors, Tesla's Dojo is made in a very large size during the packaging process. Because of this, Tesla has adopted TSMC's SoW (System-on-Wafer) packaging technology. SoW is a technology that connects memory and system semiconductors directly on a wafer without using a substrate (PCB), which is used in conventional packaging processes. The connection of each chip is handled by a fine copper redistribution layer (RDL) formed on the bottom of the chip. Because the entire wafer is used, it can handle ultra-large semiconductors. In the case of D1, a single 654 mm² chip based on TSMC's 7-nanometer (nm) process is used. A total of 25 of these chips are arranged in a 5x5 array on a wafer, and each chip is electrically connected to form a single module. The entire wafer is used as a kind of substrate. However, SoW is a special packaging targeting ultra-large semiconductors, and the number of chips mass-produced is relatively small. Since the immediate sales volume is not large, it is difficult to get aggressive support from TSMC for both the front-end and back-end processes. In contrast, Samsung Electronics and Intel are in desperate need of securing large customers, and it is highly likely that they have each offered favorable terms to Tesla. A semiconductor industry source stated, "I understand that Samsung Electronics is also advancing its advanced packaging technology that can handle ultra-large semiconductors," and "While Intel is scheduled to make the initial entry into Dojo 3 module packaging, it is expected that Samsung Electronics will also be able to enter the supply chain in the future depending on the technology development situation."
Intel Likely to Respond to Tesla Based on EMIB
Meanwhile, Tesla is reportedly planning to use Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology for Dojo 3. EMIB is Intel's proprietary 2.5D packaging technology. 2.5D packaging refers to a method of connecting each chip by inserting a thin film called a 'silicon interposer' between the chip and the substrate. Instead of placing a large interposer underneath the chips like conventional 2.5D packaging, EMIB connects chips with a small silicon bridge inserted inside the substrate. By placing bridges only where chip-to-chip connections are needed, chips can be arranged more flexibly and efficiently. Unlike 2.5D packaging, which is limited in die size expansion depending on the size of the interposer, it is also advantageous for composing dies over a wider area. However, even with commercially available technology, EMIB is evaluated as being difficult to manufacture ultra-large chips at the wafer level. For this reason, the industry believes that Intel may be considering new EMIB technology and facility investments for Dojo 3.
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Tesla is reportedly making a major change to its 'Dojo' supercomputing system supply chain, tapping both Samsung Electronics and Intel. Tesla is understood to be moving away from a structure where TSMC handled the entire process, instead pursuing a bifurcated approach where Samsung Electronics and Intel each take on specific processes. This is expected to bring significant changes to the supply chain. Samsung Foundry will manufacture the Dojo chips, while Intel will handle the specialized packaging technology for module production. For a long time, Samsung Electronics and Intel have been in a competitive relationship in the advanced foundry and packaging industries. However, with Tesla at the forefront, attention is now focused on whether a new cooperation structure and supply chain system will be formed in the AI semiconductor industry. According to an aggregation of G-Cnet Korea's reporting, Tesla is currently in talks with both companies to simultaneously utilize Samsung Electronics and Intel for the mass production of its third-generation Dojo.
Tesla Pursuing Samsung Foundry and Intel OSAT Utilization... "An Unprecedented Cooperation Structure"
Tesla has been developing its own Dojo supercomputing system to train AI models with data related to Full Self-Driving (FSD). Dojo integrates multiple of Tesla's custom AI semiconductors, the 'D-series' chips. For example, the first-generation Dojo is composed of a module with 25 D1 chips packaged together. It is known that TSMC, a major Taiwanese foundry, was solely responsible for the mass production of both Dojo 1 and 2. However, the supply chain is expected to be completely changed starting with Dojo 3. Tesla is currently understood to be pursuing a plan to have Samsung Electronics handle the front-end process for the 'D3' chips for Dojo 3, and Intel handle the packaging process for the modules. Multiple sources familiar with the matter explained, "Tesla is proposing a plan to separate chip mass production and module packaging in the Dojo 3 supply chain discussions," adding, "Based on this plan, specific contract agreements are being discussed with partners." If the contract is finalized, it will be the industry's first collaboration between Samsung Foundry and Intel OSAT (Outsourced Semiconductor Assembly and Test), led by Tesla. While both companies operate foundry and packaging businesses, no such official cooperation has been confirmed to date. First, Samsung Electronics' bid for the mass production of the Dojo 3 chips is considered to be virtually certain. Samsung Electronics previously signed a ₩22.76 trillion semiconductor consignment manufacturing contract with Tesla on the 28th of last month. At the time, Tesla CEO Elon Musk stated, "Samsung Electronics will be dedicated to the mass production of AI6 chips at its new foundry fab in the United States." AI6 is a semiconductor that can be used for Tesla's next-generation FSD, robots, and data centers, and is known to be based on a 2-nanometer process. Furthermore, Tesla has stated that it will not design a separate chip for Dojo 3 but will integrate the AI6 and Dojo 3 chips into a single architecture. In the second-quarter earnings conference call, CEO Elon Musk said, "We are considering a direction to basically use the same chip for Dojo 3 and AI6," adding, "For example, using two chips for cars or humanoids, and 512 for servers."
Dojo Requires Specialized Packaging for Ultra-Large Semiconductors
The analysis suggests that both technology and supply chain factors are behind Tesla's move to bifurcate the chip and packaging partners for Dojo 3. Unlike typical system semiconductors, Tesla's Dojo is made in a very large size during the packaging process. Because of this, Tesla has adopted TSMC's SoW (System-on-Wafer) packaging technology. SoW is a technology that connects memory and system semiconductors directly on a wafer without using a substrate (PCB), which is used in conventional packaging processes. The connection of each chip is handled by a fine copper redistribution layer (RDL) formed on the bottom of the chip. Because the entire wafer is used, it can handle ultra-large semiconductors. In the case of D1, a single 654 mm² chip based on TSMC's 7-nanometer (nm) process is used. A total of 25 of these chips are arranged in a 5x5 array on a wafer, and each chip is electrically connected to form a single module. The entire wafer is used as a kind of substrate. However, SoW is a special packaging targeting ultra-large semiconductors, and the number of chips mass-produced is relatively small. Since the immediate sales volume is not large, it is difficult to get aggressive support from TSMC for both the front-end and back-end processes. In contrast, Samsung Electronics and Intel are in desperate need of securing large customers, and it is highly likely that they have each offered favorable terms to Tesla. A semiconductor industry source stated, "I understand that Samsung Electronics is also advancing its advanced packaging technology that can handle ultra-large semiconductors," and "While Intel is scheduled to make the initial entry into Dojo 3 module packaging, it is expected that Samsung Electronics will also be able to enter the supply chain in the future depending on the technology development situation."
Intel Likely to Respond to Tesla Based on EMIB
Meanwhile, Tesla is reportedly planning to use Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology for Dojo 3. EMIB is Intel's proprietary 2.5D packaging technology. 2.5D packaging refers to a method of connecting each chip by inserting a thin film called a 'silicon interposer' between the chip and the substrate. Instead of placing a large interposer underneath the chips like conventional 2.5D packaging, EMIB connects chips with a small silicon bridge inserted inside the substrate. By placing bridges only where chip-to-chip connections are needed, chips can be arranged more flexibly and efficiently. Unlike 2.5D packaging, which is limited in die size expansion depending on the size of the interposer, it is also advantageous for composing dies over a wider area. However, even with commercially available technology, EMIB is evaluated as being difficult to manufacture ultra-large chips at the wafer level. For this reason, the industry believes that Intel may be considering new EMIB technology and facility investments for Dojo 3.
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