To a lawyer, the term intellectual property means just about anything intangible that has value. However, when you bring that term up in the context of semiconductor design, it means something pretty specific to most people. Yet the implied meaning of the term intellectual property (IP) within the semiconductor field has changed over the years. In my estimation, the term IP has applied to things that can be reused, especially in the form of saleable design content. Initially IP was used to refer to explicitly reusable things like libraries and hard macros that were sold to other enterprises.
Over many years the meaning has expanded in two dimensions: more for design content used internally and for higher levels of abstraction such as RTL, simulation views, and system or architectural level specifications. Not surprisingly, the definition has shifted as a result of improvements in the ability to actually reuse design content.
The industry began making meaningful steps toward improving IP reuse back in 2003 when the SPIRIT Consortium started developing the IP-XACT standard. The Spirit Consortium was made up of companies that use EDA tools and those that develop EDA tools. The SPIRIT board included ARM, Cadence, Freescale, LSI, Mentor, NXP, ST Synopsys and TI. The composition of this board speaks to the perceived importance that IP and its reusability had gained. Later in 2009 SPIRIT merged with Accellera, another highly regarded EDA standards organization, and continued to develop IP-XACT for enabling IP reuse.
In 2010 IP-XACT became an IEEE standard, IEEE 1685. According to Accellera:“The IP-XACT forms that are standardized include: components, systems, bus interfaces and connections, abstractions of those buses, and details of the components including address maps, register and field descriptions, and file set descriptions for use in automating design, verification, documentation, and use flows for electronic systems. A set of XML schemas of the form described by the World Wide Web Consortium (w3c) and a set of semantic consistency rules (SCRs) are included. A generator interface that is portable across tool environments is provided. The specified combination of methodology-independent meta-data and the tool-independent mechanism for accessing that data provides for portability of design data, design methodologies, and environment implementations.”
The net result is that now when we apply the term IP to semiconductors, it can mean almost any facet of each stage of a design. This is no accident. The goal has always been to be able to reuse previous design efforts on new projects without starting over from scratch. IP-XACT has made a meaningful contribution to this.
One interesting consequence of this is that there are more consumers of IP related information. Originally there were “customers” who received a well-defined package as a commercial product. I do not want to underplay the challenge in doing this, but now there can be multiple internal and external recipients for various different views of IP. IP-XACT can help greatly with this process.
Of course, IP-XACT is useful for creating designs. It systematically allows designers to define interfaces, registers, address maps, etc. If everyone is working from the same playbook, fewer errors will occur during integration. It enables earlier communication about system elements. The actual design, be it Verilog, VHDL, netlist or other EDA tool specific representation, is held in its native format. IP-XACT can provide an ideal mechanism to distribute a specific subset, or representation, of the design to each group that needs it.
Magillem, a leader in IP-XACT solutions, has created a group of tools for working with IP-XACT. One of them is aimed at generating design distributions that are tailored to the exact needs of the specific consumer. It is easy to see that a verification team might need simulation views and the design hierarchy. Or on the other end of the spectrum, a customer might need to only get hard macros, but not the RTL or netlist used to create it.
In Magillem’s solution, designs consist of views of the design that point to various file sets. The IP-XACT representation understands the design hierarchy and can be used to selectively traverse it to assemble all the necessary elements. They can be generated individually or as part of a fully elaborated hierarchical assembly.
I recently had a conversation with Vincent Thibaut, Chief Strategy Officer at Magillem, about their generation capability. He talked about their Packager (MIP) that takes legacy IP that does not have IP-XACT information and creates an IP-XACT certified description, making it ready for use in an IP-XACT system. Magillem customers can use the Magillem Generator Studio (MGS) to create views that are needed by any consumer. Data sheets for both, the Magillem IP-XACT Packager and the Magillem Generator Studio are available for download on their website. In addition to this they offer a full suite of IP-XACT tools for managing every aspect of the IP-XACT process.