During DVCon 2018 in San Jose, one topic widely covered was the necessity of describing and capturing intent. Defining our design intent up-front is crucial to the overall success of a design implementation. It is not limited to applying a process level intent, such as the use of verification intent with embedded assertions in code or optimization intents through the use of constraints capture in SDC or UPF, but also it is to be done at the architectural level. With the shift-left trend being touted at many design forums, to have an architectural intent should reduce the chance of ambiguity and potential failures.
Magillem has been an EDA platform provider for configuring, integrating and verifying IPs. Its product called Magillem Platform Design Solution is comprised of four stages: specification, design, documentation and data analytics. The following table captures all the stages and its adjoining product solutions.
In current design environment, system architects are prone to be disconnected from the design teams as facilities used to capture the architectural intent are not integrated into the overall flow. For example, a hardware system description is pushed down to the design team to be recaptured through a logical implementation that involved changes which do not get fed back to the architect. This usually occurs as the system abstraction involved basic drawings without any semantic value of the elements.
Magillem has introduced Magillem Architecture Intent or in short MAI as a front-end design environment for system architecture inception. It bridges the gap between software intent and hardware refinement. The inputs can be originated from either a software map (software intent flow) or from a hardware map (block diagram). This product fits at the top of the Magillem tool chain as captured in the above table. MAI ensures coherency in design views are intact when further refinement taken place along design implementation.
The main features for MAI include the following:
- On the software side, it captures a given system from software system map and generates an early hardware description. The existing product, called Magillem Registers Engine (MRE), provides an advanced register language that allow one to develop, elaborate, and compile register descriptions from various formats such as Excel, SystemRDL and CMSIS (Cortex Microcontroller Software Interface Standard) and generates IP-XACT format output.
- On the hardware side, it captures a given system from hardware block diagram, tracks and synchronizes any hardware refinement or software interface updates.
- Allows exploration of schema design and traversing across hierarchies with added flexibilities of filtering only targeted schema of interest, auto placement of components, or graphically duplicating specific schemas.
- Provides granularity of design entities viewing (component instances, bus interfaces, connections, bus and interface parameters, etc.)
- Generate an IP-XACT description of captured design.
- Includes APIs and an editor for design refinements.
There are many ways of capturing architectural intents. In a top-down design flow, an integrated capture facility such as MAI may prevent incoherencies in both design efforts and contents.