I first met John Durbetaki at Intel in Aloha, Oregon and we both had a keen interest in the nascent personal computer industry. My first PC was made by Radio Shack and dubbed the TRS-80 which maxed out at 48KB of RAM. I kept watch on Durbetaki as he left Intel and formed his own company OrCAD in 1985 to serve the needs of PC-based CAD software. OrCAD started out with just schematic capture, but then added simulation and PCB layout tools, finally being acquired by Cadence in 1999. Last week I spoke with two folks at Cadence about what’s new with their PCB software, and they shared the eight latest improvements. Cadence divides up the PCB world into two different product lines based on design complexity: OrCAD for low-end designs, and Allegro for high-end designs.
Hemant Shah started out with an update on what’s new with Allegro, their PCB tools for enterprise users. The four latest improvements in Allegro 17.2-2016 are:
A lot of our consumer electronics devices use flex and rigid-flex designs: watches, glasses, tablets, phones. By laying electronic components on top of flexible cable you can pack more features into a smaller space. This 17.2 release for Allegro lets you define stack-up by zones, perform DRC violations for flex layers and perform arc-aware routing.
Concurrent Team Design
Divide and conquer is a proven approach to getting more work done in a shorter time, and so now you can use Allegro in either an ad-hoc team design (no setup) or a structured team design (some setup). When you divide the PCB project between five designers, then routing can be done concurrently which saves up to 80% in time versus the old way of doing a combined routing.
Allegro and Sigrity
Cadence purchased Sigrity back in 2012 because of their signal integrity tools for PCB designers, and now this integrated technology ensures that your critical high-speed signals are meeting the performance criteria with features like:
- Tabbed routing
- Custom return path via structures
- Extended in-design rules for backdrilled vias
- PI (Power Integrity) for PCB designers
Performance and Capacity
The 17.2 release now supports a 64-bit OS, so RAM can be up to 18 Quintillion and database sizes up to 3GB. Any of your CPU-intensive applications will see performance gains. Two additional improvements are a new cross-section editor, and a new padstack editor.
Up next was Kishore Karnane and he talked about four new improvements to the OrCAD 17.2 release:
The OrCAD tools are ideally suited for designs in the IoT marketplace because of the ease of use, productivity and low cost.
Often during the design process there have been multiple changes made, but you want to know how many changes and where each one is located. This graphical design difference feature will show you exactly what has changed, both logically and graphically, saving time so that you don’t have to attempt a manual comparison.
In a PCB design every electrical component has a unique instance name, so you can either assign these instance names manually or use some automation. With OrCAD 17.2 you have plenty of automation for instances:
PSpice for Virtual Prototyping
IoT systems typically have analog sensors, processors, peripherals, etc. PSpice can simulate all of the mixed-signal sensors, then you can simulate your RTL and TLM with the Incisive simulator as shown below:
You can even swap out your controller virtual platform with the actual hardware by using DMI through an Arduiono board.
PCB Designer with flex
Remember those new flex and rigid-flex features in Allegro? Well, you also get the same thing in OrCAD now. Teams that start a project with OrCAD can even decide to upgrade and use Allegro, because they’ve made this a scalable transition.
The PCB marketplace has changed dramatically since the 1980s and Cadence has kept up with current trends by offering two product lines in OrCADand Allegro, so choose the one that best fits your technical needs and budget.
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