WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 567
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 567
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
)
            
14173 SemiWiki Banner 800x1001
WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 567
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 567
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
)

How ML Enables Cadence Digital Tools to Deliver Better PPA

How ML Enables Cadence Digital Tools to Deliver Better PPA
by Mike Gianfagna on 10-28-2020 at 10:00 am

How ML Enables Cadence Digital Tools to Deliver Better PPA

There has been a lot written about artificial intelligence/machine learning (AI/ML) and its application in the Cadence digital design flow. Most recently, I covered significant verification efficiency improvements in Xcellium ML.  A recent digital-themed white paper from Cadence takes a broader look at the impact of ML on power, performance and area (PPA). I had a chance to speak with Rod Metcalfe, product management group director in the Digital & Signoff Group at Cadence. Rod has a broad background in EDA, having worked at Synopsys, Magma, Avant!, Viewlogic and GEC Avionics before joining Cadence almost six years ago. He is the author of the white paper and quite knowledgeable on the subject of how ML enables Cadence digital tools to deliver better PPA.

The white paper begins with a discussion of ML as part of the Cadence Innovus Implementation System. ML, along with multi-threading and support for massively parallel computing are mentioned. The piece states that this makes developing a device with more than 10 million instances easier. I quizzed Rod on where a 10 million instance design fit in the spectrum of cutting-edge. His view was a design of this size was becoming mainstream. We’re in the big leagues now.

Any discussion of ML at Cadence will advance the concept of “ML inside” and “ML outside”, referring to how machine intelligence is implemented in the flow. Rod’s white paper had an excellent definition of these concepts. It is worth repeating here:

[ML] Inside means using ML to reduce the time required to achieve timing closure inside the tools, while [ML] outside refers to using expert systems to help close the loop across a complete iterative design flow. The former is effective because it allows ML to carry out “what-if” evaluations much faster, while the latter will help engineers with the necessary knowledge to make design and flow decisions more quickly.

There is an important process implied in this notion.  Designers are faced with many, many choices in the early phase of a complex design project. If ML can point the designer in the right direction by making (very) informed decisions regarding the best path to take, this has a fundamental impact on the efficiency and quality of the design process. Another quote from the white paper drives this point home:

What is important at this early stage is the speed with which the results can be generated, along with enough accuracy to inspire confidence. As there is limited design data available at this early stage in the design flow, this can be difficult. However, the amount of data available at the end of the place-and-route stage is considerable, which allows timing prediction to be much more accurate. The opportunity here is to use this late-stage data to deliver better early-stage results.

With regard to using late-stage data to make a more informed decision for the (next) early stage process, this is how ML in EDA makes an impact—how “old” data becomes a vibrant source of new perspectives.

I discussed the division of labor for these tasks with Rod. It turns out the customer is a key part of the process. Cadence develops advanced algorithms that “learn” from prior results, but the customer is the one who “trains” the tool with data from their unique design process. Before the days of ML, the EDA vendor would send an experienced AE to the customer site, and that person would perform the tuning function for the customer. Now, the customer can do it themselves with their own data, thanks to these new algorithms. This is real progress and a new way of working.

There are many more valuable and thought-provoking insights in this white paper. I’ll conclude with two of them. First, real PPA improvements for a high-performance CPU design are shared across 5nm – 12nm examples. Timing and power improvements are eye-popping. You need to read the white paper.

Second, there is a discussion of how to use ML and expert systems to automatically optimize a complete design implementation flow across many different tools. I quizzed Rod about this. Was this a futuristic comment, or did it describe something that is working today? He explained this is very real and working today. Want to learn more?  Read the white paper. You can find out how ML enables Cadence digital tools to deliver better PPA here.

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