On October 10, I attended another Cadence Summit, this one titled the Cadence Mixed-Signal Technology Summit. Recently, I had written about the Cadence Silicon Verification Summit. The verification event was the first of its kind, and I thought it had terrific content. Being more of a digital guy myself, I was unaware that Cadence had been holding these mixed-signal events for a several years now and that this one was the fourth. I’ll admit that as the day went on, more of the discussion went beyond my technical background. Of course, I have a BSEE and I have worked in the SPICE world before, but it is an entirely different thing to be a mixed-signal designer. I now have a much deeper appreciation of the field.
Brian Fuller was once again the moderator of the event. As I mentioned before, if you haven’t seen Brian’s videos on the Cadence website they are truly entertaining and you should check them out. Dr. Chi-Ping Hsu, Cadence’s Sr. VP R&D and Chief Strategy Officer, spoke next. His remarks were brief but informative, reminding us of Cadence’s huge investment (~10,000 man-years) and long history (more than 20 years!) of providing tools for mixed-signal design. The initial driving force for this effort was SDA founder Jim Solomon; as I understand no slouch in mixed-signal design himself. The two speakers that followed gave very enlightening keynote presentations that made the entire day worth it for me.
First, was the Academic Keynote: Challenges in Emerging Mixed-Signal Systems and Applications by Prof. Terri S. Fiez, Professor and Head of the EECS Department at Oregon State University. Professor Fiez started by listing the most challenging and fastest growing applications requiring mixed-signal design expertise: medical, smart home, communications, energy, and transportation. One of the topics focused on was the evolution of solar panels. Traditional solar panels send DC power off the panel to a separate inverter to convert it to AC power with additional logic to integrate it worth the power grid or the user’s home. Smart solar panels need to go straight form the panel to the grid, meaning the previous off-panel intelligence needs to be built into the solar panel itself. A significant future goal is to have scaled systems able to work from/between 200W to 500kW. There is a need to eliminate the electrolyte capacitor currently used in order to achieve 25-year reliability while increasing energy harvesting by 4x! Did I mention I have a new appreciation for mixed-signal designers? As a preview to the next presentation, Prof. Fiez went on to talk about energy harvesting for use in remote sensors. This was getting fun…
Next up was Geoff Lees, SVP and GM microcontrollers for Freescale. Mr. Lees’ presentation was titled Designing for the Internet of Things (IoT), Peering Into the Future, Edge Node Integration. This was a fascinating presentation. The IoT will include a huge variety of remote sensors and microcontrollers that need to be powered by something other than an outlet or a battery (energy harvesting). Mr. Lees’ discussed nine different techniques for energy harvesting in development in industry now. In addition, security is critical; in Mr. Lees’ opinion, IPV6 is the “holy grail” for the IoT security concerns. Power is also challenging at each technology node because computing capabilities have been going up by 2.8x at each node while leakage seems to be increasing exponentially. So, edge nodes (the remote devices in the IoT) require off-states and low power is more important than performance. Looking at semiconductor processes, Mr. Lees indicated that 28nm will become the workhorse process for mixed-signal design for a very long time due to both the cost of using more advanced nodes and the fact that the transistors are changing from HKMG to FinFET. Which leads us to the next presentation…
Douglas Pattullo the Technical Director of TSMC North America spoke next. He talked about the processes TSMC is developing, and more importantly, what he sees in the future for mixed-signal design. Looking at that transition to FinFET, it is clear that we should not expect the W/L control over transistors that we have been accustomed to. Analog designers will need to live with unitized transistors (transistors with an integer number of fins). What was possible in planar transistors just cannot be done with fins. While I would say the TSMC view of mixed-signal design at 14nm was more positive than Freescale’s view, I think it is agreed that 28nm will be the home of mixed-signal design for a long time.
There were many other presentations by Cadence personnel, as well as Cadence’s customers, after the TSMC talk. Most of them went over my head. My respect for mixed-signal designers having reached a new high, I headed out of the Cadence Building 10 auditorium before the conclusion of the event feeling a bit humbled by the geniuses still in the room.
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