WP_Term Object
(
    [term_id] => 45
    [name] => Aldec
    [slug] => aldec
    [term_group] => 0
    [term_taxonomy_id] => 45
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 96
    [filter] => raw
    [cat_ID] => 45
    [category_count] => 96
    [category_description] => 
    [cat_name] => Aldec
    [category_nicename] => aldec
    [category_parent] => 157
    [is_post] => 1
)

Aldec is Celebrating 30 Years @ #51DAC!

Aldec is Celebrating 30 Years @ #51DAC!
by Daniel Nenni on 05-02-2014 at 8:00 am

Dr. Stanley Hyduke founded Aldec in 1984 and their first product was delivered in 1985, named SUSIE (Standard Universal Simulator for Improved Engineering), a gate-level, DOS-based simulator. The SUSIE simulator was priced lower than other EDA vendor tools from the big three: Daisy, Mentor and Valid (aka DMV). Today, Aldec EDA tools are used to design, simulate and verify FPGA, ASIC, SoC and embedded system designs. There are over 35,000 users of Aldec tools with distribution in over 43 countries. Aldec remains one of the few privately-held EDA companies with a 30 year history, while in that same time period the EDA industry has seen literally hundreds of smaller companies get acquired by larger ones.

Aldec will sponsor DAC’s annual Monday Night Networking Reception (SemiWiki will sponsor Tuesday’s reception). All registered DAC Attendees and Exhibitors are invited to join and celebrate Aldec’s 30 Year Anniversary with free cocktails, hors d’oeuvres, cupcakes and prizes. CUPCAKES!!!!

DAC Monday Night
Networking Reception

Monday, June 2, 2014
6:00pm – 7:00pm

Moscone Center Esplanade Foyer

Technical Sessions and Demonstrations
June 2-4, 2014 from 9:00am-6:00pm at Booth #1521

Session 01: Quick Intro to SCE-MI
Session 02: OSVVM: Advanced Verification for VHDL with Synthworks
Session 03: SoC Emulation Made Easy
Session 04: Visual Mapping: GPS for UVM Journey
Session 05: High Level Synthesis with NEC
Session 06: Requirements-Based Verification
Session 07: Design Rule Checks in FPGA design
Session 08: Prototyping over 100M Gates
Session 09: Ask Aldec: Demos, Roadmaps, Partners, Q&A, etc.

1-on-1 Sessions fill up quickly. Visit http://www.aldec.com/dac2014to register. Choose one or more sessions and schedule a time that is convenient for you.

About Aldec
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

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