It was the best of times (for stocks)
It was the worst of times (for memory chips)
The disconnect between stock & chip prices
The Venn Diagram of Stocks and Chips
Having been involved with semiconductor and tech stocks for a long time there has always been a loose correlation between the fortunes of the industry and the fortunes… Read More
SPIE Advanced Lithography Conference – Imec and Veeco on EUV
At the SPIE Advanced Lithography Conference Imec presented several papers on EUV and Veeco presented about etching for EUV masks. I had the opportunity to see the presentations and speak with some of the authors. In this article I will summarize the key issues around EUV based on this research.
EUV is ramping up into high volume 7nm… Read More
An old IP theft gets a new Chinese label
The Dutch financial newspaper Financieele Dagblad (FD) reported on the past theft of ASML technology after doing some investigative digging. It now appears that a number of Chinese nationals and ASML employees, in ASML’s Santa Clara office stole key technology back in 2015. Though ASML talked about it at the time, little… Read More
The Answer to Why Intel PMOS and NMOS Fins are Different Sizes
Like many others, we have often wondered why the PMOS fins on advanced microprocessors from Intel are narrower than the NMOS fins (6nm versus 8nm). This unusual dimensional difference first occurred at the 14nm node and it coincided with the introduction of Solid State Doping (SSD) of the fins at this node.
We have concluded that… Read More
The ESD Alliance Welcomes You to an Evening with Jim Hogan and Paul Cunningham
An informal “Fireside Chat” like no other featuring Jim Hogan, managing partner of Vista Ventures, LLC., and Paul Cunningham, Cadence’s corporate vice president and general manager of the system verification group, is in the works for Wednesday, April 10.
Hosted by the ESD Alliance, a SEMI Strategic Association Partner, at … Read More
What to Expect from the GSA Executive European Forum?
I plan to attend to the GSA European Forum in Munich (April 15-16), so I first looked at the event description and at the impressive speakers list. In such event, the goal is at 50% to listen, and 50% to network with the speakers and the other attendant. The center of gravity is clearly semiconductor, but the event involved speakers … Read More
Moore’s Law extended with new "gateless" transistor
Micron Buries the Hatchet with China
Micron has a very long history of counter cyclical investing, buying the assets of vanquished competitors when the memory industry is at the bottom of the cycle, such as it is right now.
Over the weekend, Micron announced that it had an agreement to acquire the assets of the now stalled Jinhua memory… Read More
Semiconductor Market Downturn in 2019
The global semiconductor market grew 13.7% in 2018, according to World Semiconductor Trade Statistics (WSTS). Each year, we at Semiconductor Intelligence review semiconductor forecasts and compare them to the final WSTS data. We used projections which were publicly released from late 2017 through early 2018, prior to the … Read More
SPIE Advanced Lithography Conference – ASML EUV Update
At the SPIE Advanced Lithography Conference ASML gave an update on both the current 0.33NA system and the 0.55 high-NA system development. I saw the presentations and got to sit down with Mike Lercel (Director of Strategic Marketing).… Read More
China Innovation Forum and ES DESIGN West
I had a chat with Bob Smith, Executive Director of ESD Alliance, about the upcoming SEMI conference in China. More than 100,000 people are expected to attend which is beyond my comprehension. SEMICON in San Francisco is maybe 20,000 people which is the largest conference I attend. I’m not sure if the Design Automation Conference… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot