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FPGA based Prototyping
Unless you’ve been in hibernation for a while, you probably know that a lot more chip design is happening in system companies these days. This isn’t just for science experiments; many of these designs are already being used in high-value applications. This development is captive – systems companies generally don’t want… Read More
I was fortunate to have a 1-on-1 with Anirudh before he delivered the keynote at DVCon. In case you don’t know the name, Dr. Anirudh Devgan is Executive VP and GM of the Digital & Signoff Group and the System & Verification Group at Cadence. He’s on a meteoric rise in the company, not least for what he has done for Cadence’s position… Read More
DVCon 2017 is a big week for Cadence verification announcements. They just released their Xcelium simulation acceleration product (on which I have another blog) and they have also released their latest and greatest prototyping solution in the Protium S1. This is new hardware based on Virtex UltraScale FPGAs on Cadence-designed… Read More
When talking to suppliers about their products, conversation tends to focus heavily on what they already have and why it is the answer to every imaginable need in their space. So it’s refreshing when a vendor wants to talk about where customers want to go without claiming they already have the answer wrapped up in a bow. I recently … Read More
I haven’t sat down to speak with S2C since we collaborated on the book, PROTOTYPICAL, published just before DAC 2016 and even then, I hadn’t spoken to Toshio Nakama, their CEO. Toshio splits his time between the San Jose headquarters and the Shanghai headquarters so getting time to meet face-to-face has been challenging. I was finally… Read More
This interview originally appeared as the foreword to our book “Prototypical: The Emergence of FPGA-based Prototyping for SoC Design” but I thought it would be worth publishing for those of you who have not downloaded it yet. I also wanted to mention that our friends at S2C are currently offering a 50% discount on the… Read More
OpenCL brings algorithm development into a unified programming model regardless of the core, working across CPUs, GPUs, DSPs, and even FPGAs. Intel has been pushing OpenCL programming for some time, particularly at the high end with “Knights Landing” processors. Where other vendors are focused on straight-up C high-level … Read More
Aldec has offered front-end EDA tools for over 30 years but may not be a familiar name to mainstream IC design engineers. That’s probably because for most that period they haven’t really targeted IC design. They have been much more focused on PC-based design for FPGAs particularly where requirements traceability has been important,… Read More
Cadence Design Systems is a long-standing provider in hardware emulation, but a relative newcomer to FPGA-based prototyping. In an upcoming lunch and learn session on November 11 in San Jose, Cadence teams will be outlining their productivity strategy. What’s different with their approach and why is this worth a lunch?… Read More
We’ve had several blogs introducing the Juno ARM Development Platform as a vehicle for ARMv8-A software development. S2C has jumped in with a module connecting their FPGA-based prototyping platform to the Juno, enabling more advanced IP… Read More
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