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The Design Automation Conference is the largest and most diverse event in the fabless semiconductor ecosystem. Next week in San Francisco you will see technology and people you have never seen before. You will benefit from the efforts of hundreds of thousands of semiconductor professionals like myself who have dedicated their… Read More
By offering low-power PCI Express PHY solution for mobile application! To make it clear, we are not talking about Mobile Express (M-PCIe), but clearly about PCI Express protocol, including a PCIe Controller and a PCIe PHY. Initially developed to support internal connection between the CPU and the GPU in a PC, the technology has… Read More
Hybrid IP Prototyping Kit from Synopsys!
Synopsys has launched IP Accelerated initiative last year. The goal was clearly to accelerate Time-To-Market by providing a complete set of “tools” to augment design productivity:
Before answering the question we should try to define what is behind “Vision”, which type of applications and evaluate this heterogeneous market weight. Embedded Vision (EV) is the use of computer vision in embedded systems to interpret meaning from image or video. In fact vision processing requires a lot of maths functions that… Read More
Earlier this week it was the Synopsys user group meeting SNUG. Not just any old SNUG but the 25th Annual SNUG. The first one was 15th March 1991 and was attended by 100 people. At the time, Synopsys had annual revenues of $22M. This year, the various SNUGs around the world will have a total attendance of 10,000 people and Synopsys revenue… Read More
Today an SoC cannot be without multiple IP blocks integrated together in the most optimal manner. In such an environment, it’s natural that interoperability and configurability of an IP get prime considerations to achieve the best PPA (Power, Performance and Area) for the SoC containing that IP. While PPA is a basic criterion … Read More
Lately there has been significant concern over the rising costs of designing in silicon and the troubling decline in venture investments in semiconductors. These alarming trends include fewer IPOs, a falloff in the amount and frequency of early stage seed investments, and comparatively low industry organic growth rates. A … Read More
As of today NVM IP has been mostly used in SoC or IC to support very specific needs like analog trimming and calibration or encryption key integration for Digital Right Management (DRM) purpose. In other words small size (less than 1K-bit) few times programmable (FTP) NVM IP was enough to support these needs, thus most of the NVM IP… Read More
With growing SoC size, complexity, software and hardware content in it and shrinking time-to-market, the SoC design completion in time has become increasingly dependent on IP which need to be sourced (internally or externally), customized according to the design need and integrated together into the SoC. While IP providers… Read More
It’s likely that most of the current Semiwiki readers didn’t read this article posted in 2011, comparing Cadence and Synopsys with the Soviet Union and the USA, sharing the world in 1944 during the Yalta Conference. I was explaining in my post that Synopsys’s strong influence was on Design IP when Cadence’s preferred domain was … Read More
Podcast EP141: The Role of Synopsys High-Speed SerDes for Future Ethernet Applications
Podcast EP148: The Synopsys View of High-Performance Communication and the Role of Chiplets
Podcast EP152: An Informal Conversation with Aart de Geus on AI and Multi-Die at SNUG
Podcast EP169: How Are the Standards for the Terabit Era Defined?
Podcast EP178: An Overview of Advanced Power Optimization at Synopsys with William Ruby
Podcast EP185: DRAM Scaling, From Atoms to Circuits with Synopsys’ Dr. Victor Moroz
Podcast EP188: The New Demands for Memory Design and the Synopsys Approach with Anand Thiruvengadam
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