Frequent Semiwiki readers are no doubt familiar with the rapid advances in 2.5D heterogeneous multi-die packaging technology. A relatively well-established product sector utilizing this technology is the 2.5D integration of logic die with a high-bandwidth memory (HBM) DRAM die stack on a silicon interposer; the interposer… Read More
Cadence Dives Deeper at Linley Fall Processor Conference
I wrote about Cadence AI IP not long ago when I covered the Cadence Automotive Summit at the end of July (Tensilica DNA 100 Brings the AI Inference Solution for Level 2 ADAS ECUs and Level 4 Autonomous Driving, Tensilica HiFi DSPs for What I Want to Hear, and What I Don’t Want to Hear). One of those two blogs remains one of my most widely … Read More
Tensilica DNA 100 Brings the AI Inference Solution for Level 2 ADAS ECUs and Level 4 Autonomous Driving
I recently wrote about Tensilica’s HiFi DSPs which played a significant role at Cadence’s Automotive Design Summit which was held on the Cadence San Jose campus at the end of July. That article focused on infotainment while briefly touching on Advanced Driver-Assistance Systems (ADAS). ADAS is NOT synonymous with autopilot.… Read More
Tensilica HiFi DSPs for What I Want to Hear, and What I Don’t Want to Hear
It seems every day we see a new article (or ten) on autonomous driving. It is an especially hot topic, and it will happen someday. For now, we can dream about it, and many people are working on it. But for the present, the technology in a car that commands my attention is audio. I’ve been a musician since 4th grade. I still perform occasionally… Read More
Smart Hearing is Heating Up
A lot of the attention in intelligent systems is on object detection in still or video images but there’s another very active area, in smart audio. Amazon and Google smart speakers may be the best-known applications but there are more obvious (and perhaps less novelty-driven) applications in enhancing the hearing devices we already… Read More
Customizing and Standardizing IP with eSilicon at the Linley Conference
During the SoC Design Session at the just concluded Linley Spring Processor Conference in Santa Clara, Carlos Macian, Senior Director AI Strategy and Products at eSilicon, held a talk entitled ‘Opposites Attract: Customizing and Standardizing IP Platforms for ASIC Differentiation’.
Standardization is key to IP in modern … Read More
Radar is Cheaper but Autonomous Car Needs Lidar!
To replace a human driver, autonomous car will have to “see” and do it in a better way than human being. The available solution, based on camera, radar, lidar, is not perfect and need to be improved. Radar is great for “seeing” in bad weather but has insufficient resolution to distinguish distant objects. Lidar produces high-resolution… Read More
Highly Modular, AI Specialized, DNA 100 IP Core Target IoT to ADAS
The Cadence Tensilica DNA100 DSP IP core is not a one-size-fits-all device. But it’s highly modular in order to support AI processing at the edge, delivering from 0.5 TMAC for on-device IoT up to 10s or 100 TMACs to support autonomous vehicle (ADAS). If you remember the first talks about IoT and Cloud, a couple of years ago, the IoT … Read More
Low Cost Power NB-IoT Solution? Fusion F1 DSP based Modem!
Supporting NB-IoT requires low cost (optimized silicon footprint) and ultra-low power solution to cope with IoT device requirement. Cadence Fusion F1 DSP IP has been integrated in modem IC by two new customers, Xinyi and Rafael, gaining traction in NB-IoT market. These design-win builds on previous momentum: software GPS solution… Read More
Liberate Trio Embraces ML and Cloud
A chain is as strong as its weakest link. This phrase resonates well in Static Timing Analysis (STA) domain, though it is about accuracy rather than durability. As timing signoff step provides the final performance readings of a design, an STA outcome is as good as its underlying components. Aside from the parasitic extraction … Read More