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FPGA
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Virtual Platforms plus FPGA Prototyping, the Perfect Mix

Virtual Platforms plus FPGA Prototyping, the Perfect Mix
by Paul McLellan on 06-03-2012 at 8:59 pm
Categories: EDA, FPGA, Synopsys

There are two main approaches to building a substructure on which to do software development and architectural analysis before a chip is ready: virtual platforms and FPGA prototyping.

Virtual platforms have the advantage that they are fairly quick to produce and can be created a long time before RTL design for the various blocks… Read More

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AMS Programmable Prototype Platforms

AMS Programmable Prototype Platforms
by ahmed.shahein on 05-21-2012 at 10:25 am
Categories: Aldec, EDA, FPGA

AVNET released their 15[SUP]th[/SUP] Xfest this year, a couple of months ago. It was here in Germany last week. It was a well organized event, rich with invaluable technical information and full of decent smart engineers and managers. If you missed it this year register for the next event as soon as you can.

It was a very successful… Read More

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EDPS: SoC FPGAs

EDPS: SoC FPGAs
by Paul McLellan on 04-09-2012 at 4:00 am
Categories: Events, FPGA

Mike Hutton of Altera spends most of his time thinking about a couple of process generations out. So a lot of what he worries about is not so much the fine-grained architecture of what they put on silicon, but rather how the user is going to get their system implemented. 2014 is predicted to be the year in which over half of all FPGAs will… Read More

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Intel’s Fait Accompli Foundry Strategy

Intel’s Fait Accompli Foundry Strategy
by Ed McKernan on 04-05-2012 at 1:09 am
Categories: Foundries, FPGA, Intel, TSMC

As many analysts have noted, it is difficult to imagine what Intel’s foundry business will look like one, two or even three years down the road because this is all new and what leading fabless player would place their well being in the hands of one who is totally new at the game. I would like to suggest there is a strategy in place that will… Read More

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SOC Prototyping with FPGAs from a Smaller Vendor

SOC Prototyping with FPGAs from a Smaller Vendor
by Daniel Payne on 03-23-2012 at 10:43 am
Categories: FPGA

The two large EDA companies offering SOC prototyping with FPGA-based boards are Synopsys and Cadence, however there’s a smaller vendor called Polaris Design Systems that also have a product in this important design verification category. I spoke on Wednesday with Rahm Shastry, CEO of Polaris to learn more about this company… Read More

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3D-IC Physical Design

3D-IC Physical Design
by Pawan Fangaria on 02-22-2012 at 10:00 am
Categories: FPGA, Xilinx

When process nodes reached 28 nm and below, it appeared that design density is reaching a saturation point, hitting the limits of Moore’s law. I was of the opinion that the future of microelectronic physical design was limited to 20 and 14 nm being addressed by technological advances such as FinFETs, double patterning, HKMG (High-k… Read More

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Altera’s New Dual ARM® Cortex™-A9 SoC Arria® and Cyclone® V FPGA Families

Altera’s New Dual ARM® Cortex™-A9 SoC Arria® and Cyclone® V FPGA Families
by Daniel Nenni on 01-03-2012 at 7:29 pm
Categories: Arm, FPGA, IP

Altera recently introduced versions of their new Arria® and Cyclone® V FPGA families that incorporates a dual ARM®Cortex™-A9 MPCore hard core. These parts are particularly interesting to NARD as it’s consistent with the NARD concept of offering platforms unified by a common ARM® host core and a variety of controller/coprocessor… Read More

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Xilinx and Altera’s Summer At The Beach

Xilinx and Altera’s Summer At The Beach
by Ed McKernan on 10-28-2011 at 11:01 am
Categories: FPGA, Xilinx

The “old saw” is “To Sell in May and Go Away.” It’s a Maxim that particularly applies to semiconductor stocks as they typically drop from a post April earnings peak through the summer doldrums to a late September nadir only to be revived in the prelude of October earnings. It has happened again this year, although the path taken by the… Read More