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How to Increase Energy Efficiency for IoT SoC?

How to Increase Energy Efficiency for IoT SoC?
by Eric Esteve on 10-11-2018 at 12:00 pm

If you have read the white paper recently launched by Dolphin, “New Power Management IP Solution from Dolphin Integration can dramatically increase SoC Energy Efficiency”, you should already know about the theory. This is a good basis to go further and discover some real-life examples, like Bluetooth Low Energy (BLE) chip in … Read More


GLOBALFOUNDRIES Pivoting away from Bleeding Edge Technologies

GLOBALFOUNDRIES Pivoting away from Bleeding Edge Technologies
by Daniel Nenni on 08-27-2018 at 3:00 pm

It’s no secret that I have been a big fan of GLOBALFOUNDRIES since they came about in March of 2009. We even included them in our first book “Fabless: The Transformation of the Semiconductor Industry” right next to TSMC. I am also a big fan of pivoting which is the term we use here in Silicon Valley to describe some of the most innovative… Read More


TSMC GlobalFoundries and Samsung Updates from 55DAC

TSMC GlobalFoundries and Samsung Updates from 55DAC
by Daniel Nenni on 08-20-2018 at 7:00 am

One of my favorite traditions at the Design Automation Conference is the Synopsys foundry events (the videos are now available). I learned a long time ago that the foundries are the foundation of the fabless semiconductor ecosystem and your relationships with the foundries can make or break you, absolutely. I also appreciate … Read More


FDSOI Status and Roadmap

FDSOI Status and Roadmap
by Scotten Jones on 07-23-2018 at 7:00 am

FDSOI is gaining traction in the market place. At their foundry forum in May, Samsung announced they have 17 FDSOI products in high volume manufacturing (you can read Tom Dilliger’s write up of the Samsung Foundry Forum here). At SEMICON West in July, GLOBALFOUNDRIES (GF) announced FDSOI design wins worth $2 billion dollars in … Read More


SEMICON West – Soitec is becoming a key enabler

SEMICON West – Soitec is becoming a key enabler
by Scotten Jones on 07-22-2018 at 7:00 am

A variety of growing and emerging segments of the semiconductor industry rely on Silicon-On-Insulator (SOI) wafers. Soitec is the primary source for SOI wafers particularly on 300mm. On Tuesday at SEMICON I got to sit down with Bernard Aspar, Soitec’s Executive Vice President, Communication & Power BU and Christophe… Read More


Imec Technology Forum: Gary Patton of GLOBALFOUNDRIES

Imec Technology Forum: Gary Patton of GLOBALFOUNDRIES
by Scotten Jones on 05-31-2018 at 12:00 pm

The imec technology forum was held in Belgium last week. At the forum I had a chance to sit down with Gary Patton the CTO of GLOBALFOUNDRIES (GF) for an interview and he also presented “Enabling Connected Intelligence – Technology innovation: Enablers for an intelligent future” at the forum. In this article … Read More


Top 10 Highlights from the Samsung Foundry Forum

Top 10 Highlights from the Samsung Foundry Forum
by Tom Dillinger on 05-30-2018 at 9:00 am

Samsung Foundry recently held their annual technology forum in Santa Clara CA. The forum consisted of: presentations on advanced and mainstream process technology roadmaps; the IP readiness for those technology nodes; a review of several unique package offerings; and, an informal panel discussion with IP designers and EDA… Read More


Automotive FD-SOI Update

Automotive FD-SOI Update
by Daniel Nenni on 05-07-2018 at 7:00 am

We have been tracking automotive related articles on SemiWiki since 2015 and have published more than 300 automotive blogs thus far that have garnered more than one million views. The automotive publishing pace has picked up quite a bit lately and the number of domains reading them has increased exponentially. So yes, automotive… Read More


Robust Reliability Verification – A Critical Addition To Baseline Checks

Robust Reliability Verification – A Critical Addition To Baseline Checks
by Alex Tan on 03-01-2018 at 12:00 pm

Design process retargeting is acommon recurrence based on scaling orBOM(Bill-Of-Material) cost improvement needs. This occursnot only with the availability of foundry process refresh to a more advanced node,but also to any new derivative process node tailored towards matching design complexity, power profile or reliabilityRead More


Why It’s A Good Idea to Embed PVT Monitoring IP in SoCs

Why It’s A Good Idea to Embed PVT Monitoring IP in SoCs
by Daniel Payne on 02-16-2018 at 7:00 am

At Intel back in the late 1970’s we wanted to know what process corner each DRAM chip and wafer was trending at so we included a handful of test transistors in the scribe lines between the active die. Having test transistors meant that we could do a quick electrical test at wafer probe time to measure the P and N channel transistor… Read More