WP_Term Object
(
    [term_id] => 37
    [name] => Achronix
    [slug] => achronix
    [term_group] => 0
    [term_taxonomy_id] => 37
    [taxonomy] => category
    [description] => 
    [parent] => 36
    [count] => 71
    [filter] => raw
    [cat_ID] => 37
    [category_count] => 71
    [category_description] => 
    [cat_name] => Achronix
    [category_nicename] => achronix
    [category_parent] => 36
    [is_post] => 
)
Achronix Logo SemiWiki 
WP_Term Object
(
    [term_id] => 37
    [name] => Achronix
    [slug] => achronix
    [term_group] => 0
    [term_taxonomy_id] => 37
    [taxonomy] => category
    [description] => 
    [parent] => 36
    [count] => 71
    [filter] => raw
    [cat_ID] => 37
    [category_count] => 71
    [category_description] => 
    [cat_name] => Achronix
    [category_nicename] => achronix
    [category_parent] => 36
    [is_post] => 
)
Achronix
Posted on

The perfect pairing of SOCs and embedded FPGA IP

The perfect pairing of SOCs and embedded FPGA IP
by Tom Simon on 10-30-2017 at 12:00 pm
Categories: Achronix, eFPGA, Events, FPGA, IP

In life, there are some things that just go together. Imagine the world without peanut butter and jelly, eggs and potatoes, telephones and voicemail, or the internet and search engines. In the world of computing there are many such examples – UARTS and FIFO’s, processor cores and GPU’s, etc. Another trait all these things have is… Read More

Posted on

Accelerating Accelerators

Accelerating Accelerators
by Bernard Murphy on 10-19-2017 at 7:00 am
Categories: Achronix, AI, eFPGA, Events, FPGA

Accelerating compute-intensive software functions by moving them into hardware has a long history, stretching back (as far as I remember) to floating-point co-processors. Modern SoCs are stuffed with these applications, from signal processors, to graphics processors, codecs and many more functions. All of these accelerators… Read More

Posted on

Embedding FPGA IP

Embedding FPGA IP
by Bernard Murphy on 09-05-2017 at 7:00 am
Categories: Achronix, eFPGA, FPGA

The appeal of embedding an FPGA IP in an ASIC design is undeniable. For much of your design, you want all the advantages of ASIC: up to GHz performance, down to mW power (with active power management), all with very high levels of integration with a broad range of internal and 3[SUP]rd[/SUP]-party IP (analog/RF, sensor fusion, image/voice… Read More

Posted on

FPGA-Based Networking for Datacenters: A Deeper Dive

FPGA-Based Networking for Datacenters: A Deeper Dive
by Bernard Murphy on 08-10-2017 at 7:00 am
Categories: Achronix, eFPGA, FPGA, Security

I’ve written before about the growing utility of FPGA-based solutions in datacenters, particularly around configurable networking applications. There I just touched on the general idea; Achronix have developed a white-paper to expand on the need in more detail and to explain how a range of possible solutions based on their … Read More

Posted on

Embedded FPGA’s create new IP category

Embedded FPGA’s create new IP category
by Tom Simon on 07-07-2017 at 12:00 pm
Categories: Achronix, eFPGA, Events, FPGA, IP
2 Comments

FPGA’s are the new superstar in the world of Machine Learning and Cloud Computing, and with new methods of implementing them in SOC’s there will be even more growth ahead. FPGA’s started out as a cost effective method for implementing logic without having to spin an ASIC or gate array. With the advent of the web and high performance… Read More

Posted on

The FPGA Business Just Got Interesting Again!

The FPGA Business Just Got Interesting Again!
by Daniel Nenni on 06-14-2017 at 8:00 am
Categories: Achronix, eFPGA, FPGA, IP
8 Comments

FPGA’s have played an important role in the fabless semiconductor ecosystem which is why it has a full chapter in our book Fabless: The Transformation of the Semiconductor Industry. Along my career path I spent time at a start-up FPGA so I know how hard it is. I worked for GateField which was then acquired by FPGA pioneer Actel… Read More