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WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 4235
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 4235
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
    [is_post] => 
)

WLAN Design Optimization at Lantiq

WLAN Design Optimization at Lantiq
by Daniel Payne on 01-02-2015 at 7:00 am

Right now I’m typing on my MacBook Pro computer connected to the Internet through WiFi, thanks to the electronics in both my laptop and WiFi router. I kind of take WiFi for granted because it is so ubiquitous throughout my daily life, yet there are IC designers at companies like Lantiq Semiconductorthat have to design and optimize… Read More


SoCs should invest in a strong cache position

SoCs should invest in a strong cache position
by Don Dingee on 12-30-2014 at 4:00 pm

Like most technology firms, Apple has been home to many successes, and some spectacular defeats. One failure was Project Aquarius. At the dawn of the RISC era, before ARM architecture was “discovered” in Cupertino, engineers were hunkered over a Cray X-MP/48. The objective was to design Apple’s own quad core RISC processor to … Read More


ANSYS Updates RedHawk for FinFET Nodes

ANSYS Updates RedHawk for FinFET Nodes
by Tom Simon on 12-30-2014 at 7:00 am

Most designers are not using FinFETs yet, however the increased transistor density and power advantages they offer are compelling. Smaller feature sizes have been a consistent driver in semiconductor technology. Eventually the market will move more and more to FinFET processes, increasingly leaving behind planar transistors.… Read More


Top Ten Semiconductor CEOs in 2014!

Top Ten Semiconductor CEOs in 2014!
by Daniel Nenni on 12-29-2014 at 7:00 am

Since my blog about the Intel CEOs went over so well (sarcasm) I thought I should write more about semiconductor chief executive officers. This list comes from David Manners of Electronics Weekly who, unlike me, is a real journalist. Using David’s list as a starting point I will add more candidates at the end and please add yours in… Read More


Op-amps moving toward zero-drift, greater voltage range

Op-amps moving toward zero-drift, greater voltage range
by Majeed Ahmad on 12-27-2014 at 7:00 am

Operational amplifiers, which are among the most widely used analog components found in nearly all types of electronic systems, are migrating toward zero-drift capability and much-greater range of voltages at the supplies and the inputs. Take Linear Technology Corp.’s LTC2057HV, a zero-drift operational amplifier, which… Read More


Methodology Help for Analog IC Designers

Methodology Help for Analog IC Designers
by Daniel Payne on 12-25-2014 at 7:00 am

Digital designers are more numerous than analog IC designers, and so they tend to get more attention from EDA vendors in terms of tools and automation methodologies. For an analog design team with specialists focused separately on schematics and layout there are several methodology questions that need to be addressed, like:… Read More


Variation: How Can We Survive?

Variation: How Can We Survive?
by Paul McLellan on 12-24-2014 at 12:57 pm

At IEDM last week Coventor hosted a panel session as they do each year. The theme this year was surviving variation. The panel was hosted by someone whose name is familiar round here, Dan Nenni. The panel that Coventor had put together had people from all sorts of different slots in the design/supply chain for semiconductor. Unfortunately… Read More


Last VIP News of 2014

Last VIP News of 2014
by Eric Esteve on 12-22-2014 at 11:00 am

It’s likely that most of the current Semiwiki readers didn’t read this article posted in 2011, comparing Cadence and Synopsys with the Soviet Union and the USA, sharing the world in 1944 during the Yalta Conference. I was explaining in my post that Synopsys’s strong influence was on Design IP when Cadence’s preferred domain was … Read More


Results of TSMC’s ECO Fill Flow

Results of TSMC’s ECO Fill Flow
by Beth Martin on 12-22-2014 at 7:00 am

By Jeff Wilson, Mentor Graphics and Anderson Chiu, TSMC

At this year’s TSMC Open Innovation Platform® (OIP) Ecosystem Forum, Mentor Graphics and TSMC co-presented some results of the ECO Fill flow developed for TSMC customers working at advanced nodes. Here is a summary of the presentation. (TSMC customers can access the presentation… Read More


Ensuring Safety Distinctive Design & Verification

Ensuring Safety Distinctive Design & Verification
by Pawan Fangaria on 12-21-2014 at 12:00 pm

In today’s world where every device functions intelligently, it automatically becomes active on any kind of stimulus. The problem with such intelligence is that it can function unfavorably on any kind of bad stimulus. As the devices are complex enough in the form of SoCs (which at advanced process nodes are more susceptible to … Read More