Years before ISO 26262 (the auto safety standard) existed, a few electronics engineers had to worry about radiation hardening, but not for cars. Their concerns were the same we have today – radiation-induced single event effects (SEE) and single event upsets (SEU). SEEs are root-cause effects – some form of radiation, might be… Read More
Electronic Design Automation
Synopsys – Turbocharging the TCAM Portfolio with eSilicon
About 90 days ago, Synopsys completed the acquisition of certain IP assets from eSilicon. The remaining entirety of eSilicon was acquired by Inphi Corporation. I was the VP of marketing at eSilicon during that acquisition so it’s very interesting to me to find out how things are going with those certain IP assets. I got an opportunity… Read More
CEO Interview: Jason Xing of Empyrean Software
It’s been about seven years since Randy Smith last interviewed Jason Xing, the President/CEO of North America for Empyrean Software, so the timing felt good for a fresh update. I’ve been watching Empyrean at DAC for several years now, and have come away impressed with their growth and focus on some difficult IC design… Read More
How does TensorFlow Lite on Tensilica HiFi DSP IP Sound?
In all the hubbub about AI/ML, it’s easy to see why visual ML gets more attention. It’s got appeal because of applications such as autonomous driving. Because of this it’s easy to overlook the importance of audio ML. I own a Tesla and putting it into autopilot is very cool, but even it has voice recognition built in as an important feature… Read More
Cadence – Defining a Roadmap to the Future
Cadence recently published a position paper that details a set of enabling technologies that will be needed for product design going forward. Entitled Intelligent System Design, the piece describes the changing landscape of system design and the requirements for success. Cadence has built a branded approach to address these… Read More
Breker Tips a Hat to Formal Graphs in PSS Security Verification
It might seem paradoxical that simulation (or equivalent dynamic methods) might be one of the best ways to run security checks. Checking security is a problem where you need to find rare corners that a hacker might exploit. In dynamic verification, no matter how much we test we know we’re not going to cover all corners, so how can it… Read More
Project-Centric Design Process, or IP-centric
How do most IC design teams organize their work during the design process?
Most design teams would say that they organize their work into a project-centric view, and that at the beginning of the process use a tool for requirements management, maybe a bug tracker, or some design management tool. On the four IC designs that I worked … Read More
Innovation in Verification April 2020
This blog is the next in a series in which Paul Cunningham (GM of the Verification Group at Cadence), Jim Hogan and I pick a paper on a novel idea we appreciated and suggest opportunities to further build on that idea.
We’re getting a lot of hits on these blogs but would like really like to get feedback also.
The Innovation
Our next pick… Read More
Webinar on Transient Simulation of Power Transistors in Converter Circuits
Magwel is offering a webinar that takes a deeper look at how Power Transistors can be more accurately simulated in converter circuits to provide extremely accurate information about switching efficiency. DC converter circuit efficiency has a big effect on the battery life of mobile devices and can affect performance and efficiency… Read More
Webinar: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs
I had the opportunity to preview the upcoming SemiWiki webinar titled: Design Methodologies for Next-Generation Heterogeneously Integrated 2.5/3D-IC Designs. John Park’s message, describing this powerful Cadence solution, really impressed me. That’s why I want to encourage you to register for it and join this SemiWiki … Read More


Silicon Insurance: Why eFPGA is Cheaper Than a Respin — and Why It Matters in the Intel 18A Era