Autonomous driving, connected vehicles, power electronics, infotainment and shared mobility are some of the developments which have mobilized the revolution within the automotive industry in recent years. Combined, they are not only disrupting the automotive value chain and impacting all stakeholders involved but are … Read More
Electronic Design Automation
CDC, Low Power Verification. Mentor and Cypress Perspective
Clock domain crossing (CDC) analysis is unavoidable in any modern SoC design and is challenging enough to verify in its own right. CDC plus low power management adds more excitement to your verification task. I wrote on this topic for another solution provider last year. This time I want to intro an interesting twist on the problem,… Read More
The Growing Chasm in Electronic System Design
Since the formation of the Electronic Design Automation (EDA) industry in the 1970s, Moore’s law has increased functionality onto a semiconductor die dramatically. In response, EDA tools for semiconductor design have also grown in functionality and the design processes for semiconductors have moved forward at a breakneck… Read More
Conference: Embedded DevOps
The catchy phrase DevOps is defined by Agile advocates as, “The practice of operations and development engineers participating together in the entire service lifecycle, from design through the development process to production support.”
I’ve been developing software since the stone ages, which means… Read More
The Coming Evolution in Electronics Design Automation
Electronics design mega-trends have been a transformational force for the world. As shown in blue in Figure 1, the first wave of electronics consisted of centralized computing and the leaders in the field included companies such as IBM, Digital Equipment Corporation (DEC), Wang, and others. Fundamentally, these technologies… Read More
Analysis of Curvilinear FPDs
This area of automating the design of Flat Panel Displays (FPD) is so broad that it has taken me three blogs to cover all of the details, so in brief review the first two blogs were:
My final blog covers five areas:
- DRC/LVS for curvilinear layout
- Circuit
What Might the “1nm Node” Look Like?
The device roadmap for the next few advanced process nodes seems relatively clear. The FinFET topology will subsequently be displaced by a “gate-all-around” device, typically using multiple stacked channels with a metal gate completely surrounding the “nanosheets”. Whereas the fin demonstrates improved gate-to-channel… Read More
Multicore System-on-Chip (SoC) – Now What?
A quick Q&A with Jeff Hancock, senior product manager for Mentor Embedded Platform Solutions, Siemens Digital Industries Software. Jeff oversees the Nucleus® real-time operating system (RTOS) and Mentor Embedded Hypervisor runtime product lines, as well as associated middleware and professional services. Over the… Read More
NetApp’s FlexGroup Volumes – A Game Changer for EDA Workflows
In my prior post on NetApp, I discussed how the company’s FlexCache technology can keep distributed design teams in sync. Coordination and collaboration are critical elements of any complex design project. The ability to deliver results quickly while managing the massive amounts of data is also a critical element of success.… Read More
Automatic Generation of SoC Verification Testbench and Tests
Last month, I blogged about a webinar on embedded systems development presented by Agnisys CEO and founder Anupam Bakshi. I liked the way that he linked their various tools into a common flow that spans hardware, software, design, verification, validation, and documentation. Initially I was rather focused on the design aspects… Read More


RISC-V and AI: The Architecture Shift Is Now