The popularity of Pokemon Go is really no mystery – it has its roots in our hunter gatherer evolution. Pokemon Go was an App that was just waiting to happen. It’s a perfect storm. It is the scavenger hunt brought into the modern age. But more importantly it recapitulates what our ancestors had to do to survive. It taps primal and… Read More
Author: Tom Simon
Pokemon Go’s Roots in Early Human Behavior
LTE Trajectory Places High Demands on Baseband Processing
LTE stands for Long Term Evolution, and that is exactly what is happening. At the Linley Mobile & Wearables Conference 2016 we received a preview of what is coming in the mobile and wearable markets. LTE is one of the biggest drivers in this entire domain. There was much discussion about the LTE Release 12 and how it increases bandwidth,… Read More
Linley Mobile and Wearable Conference Drills into Rapidly Evolving Markets
Last week the Linley conference on mobile and wearables started with an overview and keynote address by the event’s namesake Linley Gwennap. His talk offered a few surprises and was informative all around. As you have seen recently reported here on SemiWiki, he sees smartphone shipments continuing to rise, but with a declining… Read More
How to Bring Coherency to the World of Cache Memory
As the size and complexity of System On Chip design has rapidly expanded in recent years, the need to use cache memory to improve throughput and reduce power has increased as well. Originally, cache memory was used to prevent what was then a single processor from making expensive off chip access for program or data memory. With the… Read More
Go Native – With Methodics at DAC in Austin
DAC is often a yearly reflection point for the companies that exhibit and attend. For the innovators it is an opportunity to look back and see a year of progress and development. Fortunately, this is the case for Methodics, which has had a strong year both in terms of business and technical development. Though, we easily see how these… Read More
Arteris Unveils Solution for Heterogeneous Cache Coherent SOC’s
Designing SOC’s for markets like automotive and mobile electronics requires taking advantage of every opportunity for optimization. One way to do this is through building a cache coherent system to boost speed and reduce power. Recently, NXP decided to go about this on their automotive MCU based SOC’s by using Arteris’ just-announced… Read More
Who protects power protection chips?
Power protection chips are widely used these days to protect sensitive circuitry from over-voltage and over-current stress. However, these workhorse chips are often subjected to extraordinary thermal stress themselves and need to be protected from burning up – literally.
Power protection chips work like electronic fuses,… Read More
Cache Coherent Systems Get a Boost from New Technology
The speed and power penalties for accessing system RAM affect everything from artificial intelligence platforms to IoT sensor nodes. There is a huge power and performance overhead when the various IP blocks in an SOC need to go to DRAM. Memory caches have become essential to SOC design to reduce these adverse effects. However, … Read More
Bulking Up of Design Data Calls for Version Control on Steroids
Even though design management systems are gaining popularity as a way to manage design data growth, they actually contribute to the problem of exploding data size. What we already know is that a linear increase in die size causes exponential growth in chip area, and that smaller feature sizes compound this effect in the same way.… Read More
How to Deal With Seven Design Closure Issues
The challenge of tracking design progress is a shared problem for individual designers, team leaders, and project managers. At each level the ability to step back from just reviewing error log files and seeing the arc of the whole design as it moves forward is valuable. The difficulty of seeing the whole picture is exacerbated when… Read More
Will my High-Speed Serial Link Work?