Qualcomm Attests Benefits of Mentor’s RealTime DRC for P&R

Qualcomm Attests Benefits of Mentor’s RealTime DRC for P&R
by Tom Simon on 01-31-2019 at 7:00 am

When floor planning (FP) and place & route (P&R) tools took over from custom layout tools for standard cell based designs, life became a lot better for designers of large digital chips. The beauty of the new flows was that all the internals of the standard cells and many IP blocks were hidden from view, lightening the load … Read More


Mathematics are Hard – That is Why AI Needs Mathematics Hardware

Mathematics are Hard – That is Why AI Needs Mathematics Hardware
by Tom Simon on 01-29-2019 at 7:00 am

The field of artificial intelligence has relied on heavy inspiration from the world of natural intelligence, such as the human mind, to build working systems that can learn and act on new information based on that learning. In natural networks, neurons do the work, deciding when to fire based on huge numbers of inputs. The relationship… Read More


At Last, Package and Chip integration for RF Design

At Last, Package and Chip integration for RF Design
by Tom Simon on 01-21-2019 at 7:00 am

It seems that it has always been that there were packages and ICs, and in the design tool world “never the twain shall meet”. The tools for designing packages were completely separate from the tools used to design IC’s. This was so profoundly true that even after Cadence merged with Valid Logic back in the early 90’s, their Allegro … Read More


SOC security is not a job for general purpose CPUs

SOC security is not a job for general purpose CPUs
by Tom Simon on 01-14-2019 at 7:00 am

Life is full of convenience-security tradeoffs. Sometimes these are explicit, where you get to make an active choice about how secure or insecure you want things to be. Other times we are unaware of the choices we are making, and how risky they are for the convenience provided. If you leave your bike unlocked, you can expect it to be… Read More


The Ups and Downs of Google Assistant Mini

The Ups and Downs of Google Assistant Mini
by Tom Simon on 01-09-2019 at 12:00 pm

On Star Trek when they asked the computer to do something, they never heard it say “Sorry, you have no photon torpedoes connected to your account”. However, this sort of thing is something that happens at my house when I forget the exact name of a specific light. How did I get here?

I was reluctant to buy a “home assistant” for all the reasons… Read More


Designing a fully digitally controlled DC-DC buck converter

Designing a fully digitally controlled DC-DC buck converter
by Tom Simon on 12-31-2018 at 7:00 am

One of the unsung heroes of our digital world is the modest voltage converter. Batteries and wired power sources rarely match up with the supply needs for advanced ICs. Leading edge ICs have multiple voltage domains and very often, as in the case of processors, use dynamic voltage scaling to help conserve power. Looking at where … Read More


Ethernet Enhancements Enable Efficiencies

Ethernet Enhancements Enable Efficiencies
by Tom Simon on 12-25-2018 at 7:00 am

Up until 2016, provisioning Ethernet networks was a little bit like buying hot dogs and hot dog buns, in that you could not always match up the quantities to get the most efficient configuration. That dramatically changed when the specification for Ethernet FlexE was adopted by the Optical Internetworking Forum as OIF-FLEXE-01.0.… Read More


Synopsys Offers Smooth Sailing for OTP NVM

Synopsys Offers Smooth Sailing for OTP NVM
by Tom Simon on 12-20-2018 at 12:00 pm

Nobody likes drama. Wait, let me narrow that down a bit. Chip designers really hate drama. They live in a world of risk and uncertainty, a world that tool and IP vendors spend considerable resources trying to make safer and more rational. It’s notable just how ironic that Sidense and Kilopass were duking out patent litigation in the… Read More


Embeddable FPGA Fabric on TSMC 7nm

Embeddable FPGA Fabric on TSMC 7nm
by Tom Simon on 12-14-2018 at 7:00 am

With their current line-up of embeddable and discrete FPGA products, Achronix has made a big impact on their markets. They started with their Speedster FPGA standard products, and then essentially created a brand-new market for embeddable FPGA IP cores. They have just announced a new generation of their Speedcore embeddable… Read More


56G and 112G SerDes Where the rubber meets the road

56G and 112G SerDes Where the rubber meets the road
by Tom Simon on 12-11-2018 at 12:00 pm

No matter how high the processing capability of a chip, its overall performance is limited by IO speed. This is very similar to a car with low performance tires, a powerful engine will not be able to transfer its energy to the ground effectively. There is quite literally a race going on between core processing and IO speeds for transferring… Read More