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There are a few dozen causes of semiconductor failure. Most can be lumped into one of three categories: material defects, process or workmanship issues, or environmental or operational overstress. Even when all those causes are carefully mitigated, one factor is limiting reliability more as geometries shrink – and it… Read More
For non-volatile storage in IoT devices, there is technology designed to be reprogrammed many times, and technology designed to be programmed once. The many times mode is for application code, while the once mode is for keying and calibration parameters. We are about to enter the IoT rekeying zone, in between these two extremes.… Read More
In our fascination where architecture meets the ideas of Fourier, Nyquist, Reed, Shannon, and others, we almost missed the shift – most digital signal processing isn’t happening on a big piece of silicon called a DSP anymore.
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We have to go way back in the annals of entertainment history to find the origin of the word “Jeep”, not just a term of endearment hung on a WWII utility vehicle. Pictured is Eugene the Jeep, a mystical creature belonging to the 4th Dimension, who first appeared to torment Popeye the Sailor in 1936.… Read More
I was tempted to call this piece “if you’re not using an FPGA, you’re doing it wrong,” but that didn’t quite capture the whole picture. Social memes aside, the FPGA as we know it is undergoing a serious transformation into a full blown SoC, and 2014 is the year that will usher in one of the biggest changes in the history of embedded design.… Read More
We’ve become familiar with Imagination Technologies as a leading provider of IP for mobile GPUs, and within the last year the acquisition of the MIPS architecture has established them further in NPU and SoC circles. Their latest move targets an IP solution more in line with their heritage.
Imagination, way before becoming famous… Read More
Traditional logic testing relies on blasting pattern after pattern at the inputs, trying to exercise combinations to shake faults out of logic and hopefully have them manifested at an observable pin, be it a test point or a final output stage. It’s a remarkably inefficient process with a lot of randomness and luck involved.
Getting… Read More
Ever sat around waiting for a time slot on the one piece of big, powerful, expensive engineering equipment everyone in the building wants to use? It’s frustrating for engineers, and a project manager’s nightmare: a tool that can deliver big results, and a lot of schedule juggling.… Read More
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Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools