Who is Leading in the Wearables Market?

Who is Leading in the Wearables Market?
by Daniel Payne on 09-03-2015 at 12:00 pm

My first experience with a wearable device was back in 1978 at college, it was an LED-based watch that had you push a button to read the time of day, saving battery life. Sad to say, but that electronic watch didn’t make it through the January winter at the University of Minnesota, so was promptly returned for a refund. Fast forward… Read More


Optimizing SRAM IP for Yield and Reliability

Optimizing SRAM IP for Yield and Reliability
by Daniel Payne on 08-31-2015 at 12:00 pm

My IC design career started out with DRAM at Intel, and included SRAM embedded in GPUs, so I recall some common questions that face memory IP designers even today, like:

  • Does reading a bit flip the stored data?
  • Can I write both 0 and 1 into every cell?
  • Will read access times be met?
  • While lowering the supply voltage does the cell data retain?
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Why You Really Need Chip-Package Co-analysis

Why You Really Need Chip-Package Co-analysis
by Daniel Payne on 08-28-2015 at 12:00 pm

There’s only one software company that I know of that covers four major disciplines: Fluids, Structures, Electronics and Systems. That company is ANSYS and when they acquired Apache Design Automation back in 2011 they filled out their products for electronics design, and more specifically in the area of integrated chip-package… Read More


Samsung Galaxy Unpacked

Samsung Galaxy Unpacked
by Daniel Payne on 08-14-2015 at 7:00 am

Apple announces their new products with much media attention to an audience of enthusiastic attendees, along with a live stream to all of us on the Internet who couldn’t be there in person. Samsung is following that same marketing playbook and today hosted an event in New York dubbed, “Everything Galaxy Unpacked 2015”… Read More


Design For Safety in Automotive Electronics

Design For Safety in Automotive Electronics
by Daniel Payne on 08-11-2015 at 12:00 pm

Do you remember how auto maker Toyota had to pay a $1.2 billion settlement in 2014 because some of their automotive models experienced sudden, unintended acceleration? That scenario has to be an engineer’s worst nightmare because something was missed during the design and testing of an automotive electronics system that… Read More


Virtual Reality is Ready to Rocket

Virtual Reality is Ready to Rocket
by Daniel Payne on 08-09-2015 at 7:00 am

Virtual Reality (VR) is such a hot technology concept right now that the topic has made the cover of Time, Wired and Forbes magazines this year, along with countless online articles. What really captured my attention was that moment in 2014 when Facebook acquired VR startup Oculus for $2B, yes that is billions of dollars. The last… Read More


Talking Directly to EDA R&D

Talking Directly to EDA R&D
by Daniel Payne on 08-02-2015 at 12:00 pm

Many EDA companies keep their R&D engineers focused on product development and bug fixing, shielding them from any and all direct contact with end-users, mostly for fear of what might be revealed if such direct dialog were allowed. Customer support people are allowed to talk directly with customers, then pass along enhancement… Read More


Designing an IDCT for H.265 using High Level Synthesis

Designing an IDCT for H.265 using High Level Synthesis
by Daniel Payne on 07-27-2015 at 8:00 pm

Math geeks know all about Inverse Discrete Cosine Transforms (IDCT) and a popular use is in the hardware architecture of High Efficiency Video Coding (HEVC), also known as H.265, the new video compression standard and widely used in consumer and industrial video devices. You could go about hand-coding RTL to create an IDCT function,… Read More


Device Noise Analysis, What Not to Do for AMS IC Designs

Device Noise Analysis, What Not to Do for AMS IC Designs
by Daniel Payne on 07-24-2015 at 12:00 pm

AMS IC designers have a lot to think about when crafting transistor-level designs to meet specifications and schedules, so the most-used tool in their kit is the trusted SPICE or FastSPICE circuit simulator to help analyze timing, power, sensitivity and even device noise. I just did a Google search for “device noise analysisRead More


Choosing C++ or SystemC for High Level Synthesis

Choosing C++ or SystemC for High Level Synthesis
by Daniel Payne on 07-20-2015 at 12:00 pm

Most engineers learn by doing, and so at DAC in June an EDA vendor with High Level Synthesis (HLS) tools held a language tutorial on choosing C++ or SystemC for design and verification projects. The EDA company is Calypto, and Stuart Clubb put together the tutorial on using synthesizable C++ or SystemC. The design and verification… Read More