ASIC Digital Design Engr, Sr I
![Synopsys](https://semiwiki.com/wp-content/uploads/job-manager-uploads/company_logo/2019/11/Synopsys-Logo-150x150-150x150.png)
Website Synopsys
TAIWAN – Hsinchu
The responsibility could vary from architecture analysis, micro-architecture, logic design and implementation, formal verification, simulation verification, as well as related engineering flows and environments, depending on individual’s capability and career development, which would include but not limited to related creation, implementation, analysis, debugging, and optimization work. In addition, the candidate would have a great opportunity to collaborate cross-team and cross-site in algorithm analysis, methodology development, quality improvement, product delivery, as well as SoC implementation and system bring-up, or any other engineering works that could be needed for the overall ARC team business.
Job Requirements:
• Minimum 4 to 7 years of experience in digital frontend design or verification
• Microprocessor architecture knowledge
• HDL and Verification languages: SystemVerilog, Verilog
• Micro-architecture and RTL design, or verification methodologies such as UVM/OVM, functional formal, functional coverage
• Programming skills: SystemVerilog, C/C++, assembly, Perl, Python, scripts
• Tools: RTL linters, simulators, functional formal, functional coverage, team work tools (continuous integration, source control management, issue tracking, etc.), ADL-based generation tools (such as Synopsys ASIP Designer)
• Experience with multi-site development is helpful
• Written and Verbal communication skills:
• Creation, modification and review of documentation: design or verification work plans, engineering quality processes, test scenarios, test reports
• Ability to profile the values, requirements, issues, risks, and solutions for engineering works presentation for leadership review
• Ability to follow disciplines describing issues and changes in track systems
• Analytical skills:
• Analysis of signoff requirements for product releases
• Ability to analyze QoR and verification results for major milestone reviews and assessments.
• Self-motivated team player able to thrive in a fast-paced engineering environment
• Ability to motivate and technically leading team toward desired results
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To view the job application please visit sjobs.brassring.com.
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