No reason for FD-SOI Roadmap to follow Moore’s law!

We in Semiwiki are writing about FD-SOI since 2012, describing all the benefits offered by the technology in term of power consumption, price per performance compared with FinFET, etc. Let me assess again that I am fully convinced that FD-SOI is a very smart and efficient way to escape from the Moore’s law paradox: the transistor cost is increasing for (FinFET) technology node below 20 nm, and that I expect FD-SOI to see market adoption.

But I think that some people are confused when dealing with FD-SOI. When you see some picture like this “SOI Roadmap” (from VLSIResearch), it seems that the picture designer has just made a copy of the Bulk Roadmap and pasted it with 2 years shift. Even if 28 and 22 nm FD-SOI become successful technologies –that I hope- it will take some time for the foundries supporting these nodes to generate enough ROI before investing in a way as described on this graphic.

As of today, the Bulk technology roadmap and the production status is well-known: 28 nm is in full production, 14/16 nm also, chips are in design in 7 and 10 nm and probably taped out in 10 nm. If we focus on 14/16 nm, we realize that the very high runners like application processors for mobile, PC processors and data center SoC probably represent most of the foundries (or Intel) revenues for this node, and these revenues are really high, thanks to Apple, Mediatek, Qualcomm, Samsung (and more).

As of today, the only application processor targeting FD-SOI has been demonstrated by STMicroelectronics in 2013; unfortunately, the company has now exited the mobile market. To make it clear, none of the above listed high runners chips has targeted FD-SOI and the reason is most probably linked with risk aversion. FD-SOI technology for advanced technology node is perceived as completely new (even if this is not true, see IBM) and taking the decision to move such a healthy business to a new technology is just too risky.

As a result, the heavy investment made by foundries to develop new FinFET nodes can be quickly recovered thanks to a fast and large ROI coming from the top semiconductor players who need to design always larger, faster and lower power SoC to keep their market share in the couple of very lucrative application, mobile AP, PC processor and data center SoC. And can afford the incredibly high development cost for 14/16 or 10 nm FinFET technology nodes.

If you look at this problem from another angle, that leave many more chips which will NOT be developed on these too expensive nodes, like SoC addressing application processor for automotive (infotainment, smart vehicle…), for consumer application and many more. These chips need high performance (but not the highest possible), low power (in some case like IoT the lowest possible) and a unit cost as low as possible. Because the addressed market is more in the million or 10’s million units than the 100’s million, the NRE and development cost has to be kept reasonable, and certainly not in the $100’s million like for advanced FinFET SoC.

FD-SOI adoption has started! Samsung forecast 10 tapeouts on 28nm FD-SOI this year, SONY is shipping a GPS chips (announced in Tokyo SOI Forum in January 2015), NXP has adopted 28nm FD-SOI for the two new platform (iMX-7 and iMX-8) and GlobalFoundries is well engaged in 22 FDX process. FD-SOI provides such advantage in term of power consumption, thanks to forward Biasing capability, that we can expect technology penetration in many segments where low power and low cost of ownership (unit price + NRE) is more important than ultimate performance.

But it will take time, and by the way I think that stopping the 28 nm FD-SOI roadmap in 2022 (like on the picture) doesn’t make sense. Because we can expect volume production to start only in 2017 for chips taped out this year, so it will not be surprising if 28 nm FD-SOI production last 10 years (2027). This also means that it will take longer to collect enough ROI to be in position to offer 14 nm FD-SOI. Why not offering 40 nm or even 65/55 nm FD-SOI instead? It would make sense to support SoC integrating mixed-signal and digital, addressing application like low cost IoT edge devices… If you agree with this position, you will also challenge the above forecast, at least the $6B figure for 16/14nm FD-SOI production in 2017 or 2018…

Let’s come back to the initial question: why should FD-SOI technology follow Moore’s law, when the technology has been defined as one option to escape Moore’s law paradox (higher transistor price for lower node)? I think the only reason is a lack of creativity, pushing to duplicate a concept validated for FinFET (roadmap) to FD-SOI, although the market dynamic is completely different. The technology and marketing people who have defined and marketed FD-SOI have tried to think outside the box, analysts should go outside of their comfort zone and not just resale the same framework. Which is valid for FinFET may be completely different for FD-SOI…

Eric Esteve from IPNEST –