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Semiconductor Expert Forum

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How GlobalFoundries’ CTO Nearly Became a Lawyer…Called Funkhauser

How GlobalFoundries’ CTO Nearly Became a Lawyer…Called Funkhauser
by Paul McLellan on 09-23-2015 at 7:00 am
Categories: Foundries, GlobalFoundries

I sat down for a chat with Gary Patton, the CTO of GlobalFoundries, at today’s SEMI Strategic Materials Conference where he had just given one of the keynotes (which I’ll cover another time). His family name isn’t really Patton, his grandfather’s name was Funkhauser, but his step-grandfather’s name was Patton. His father decided to go with Patton (if your name was Funkhauser maybe you would too). Gary actually dug into the ancestry, Funkhauser is obviously German, but it turns out there are none in Germany, only in Indiana.

Gary grew up in southern California and went to UCLA, originally studying Pre-Law. But he didn’t really like the way everyone involved seemed to be Marxists (hey, it was the 70s) and since he was good at math he switched to engineering. He had to scramble to catch up since he’d done a lot of humanities courses and no engineering courses. Eventually he specialized in electrical engineering. After UCLA he stayed in California but moved north and did he PhD at Standford under Jim Plummer.

At the time IBM had various research programs jointly with Stanford and also recruited heavily from there. Gary joined IBM and moved East to what IBMers call “Watson” but is really the “Thomas J. Watson Research Center”. Initially he worked on the SiGe HBT (heterojunction biplolar transistor) which resulted in a big press announcement and a couple of years ago in the IEDM 50th anniversary that paper was picked as the most significant for that year.

The expectation is that this would be the basis of future IBM servers…but then they went CMOS like everyone else. At the time IBM was not in the OEM semiconductor business, they only consumed their own semiconductors themselves, and 3rd parties were approaching them all the time. Eventually that policy changed and this turned into a power amp and RF on SOI business in Burlington (now GlobalFoundries’ Fab 9) where they are the market leader.

Somewhere around then he had to decide whether to remain on the purely technical side but he chose to transition into management. He was at IBM for 25 years, including a fair bit of research but also moving to San Jose to run IBM’s disk drive business (then on Cottle Road, near what is now Ramac Park, surely the only park in the world named after a disk drive). When that business was sold to Hitachi he moved back and for the last 8 years he ran semiconductor R&D for IBM.

Now he is doing much the same thing on the GlobalFoundries’ side of the house where he became CTO when GF acquired the IBM semiconductor business.

GlobalFoundries announced 22nm FD-SOI, which Gary thinks is a very attractive process and is highly differentiated from other foundries giving 16nm performance at 28nm price, and with software control of the forward and reverse back bias giving a very powerful knob to control power vs performance. In fact Sanjay Jha, the CEO, talked about this just last week at the Shanghai FD-SOI workshop.

The old IBM ASIC business is growing now that it is a business line for a pure-play foundry rather than a sideline for a company increasingly focused elsewhere.

I asked Gary about transistor costs. He told me that he thinks we will see real cost reduction (per transistor) for 10nm and 7nm. After all, 14/16nm is really 20nm (same metal stack) and is in some ways a poor tradeoff: it needs double patterning but only just (22nm does not need it) and it doesn’t push deep into the double patterning region to get a big payback. He also says that 7nm will be the last process that can use 193i (immersion lithography and 193nm light). After that we truly need EUV.

Talking of EUV, he told me that they have just had the UP2 upgrade to their EUV scanner in Albany. The availability is much better. In fact he worries more about availability of the tool than the other challenges. Clearly with the light source power there is a ways to go but it is looking good. There is progress on pellicles. More work needs to be done on resist but that seems more like engineering than research. But there is no denying that it is a complicated tool. But if the availability is not high then it will simply be an uneconomic technical curiosity.

One of the things that several people had talked about during the morning was the need for new interconnect. We have heard a lot about FinFET and FD-SOI over the last few years. Gary told me that in Albany they used to have more emphasis on the devices, but now he thinks they are heavier on the interconnect side. There is lots of innovation, especially using new materials, and it is the next challenge. It is no good having great transistors if we can’t connect them up.

So he sees his role, and the big picture technology strategy for GlobalFoundries to be:

  • accelerate the leading edge
  • produce differentiated solutions

So that’s how a law student is now the CTO of one of the most technical businesses in the world.

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Enterprise Design Management Comes of Age

Enterprise Design Management Comes of Age
by Tom Simon on 09-22-2015 at 12:00 pm
Categories: Dassault Systemes, EDA

The motivations for having a data and process management system in place for semiconductor design have existed for a long time. I am reluctant to admit it, but I remember early efforts to do this back in the 80’s at Valid Logic. Cadence was also developing this capability in house through the early 90’s. Back then designs were much smaller; often it would have been enough to get the design work from just one tool under management.

Today designs have billions of transistors, not hundreds of thousands. Also the advent of design platforms necessitates that not only one tool, but completely separate disciplines, such as software, board, packaging, and SOC all be managed together. We live in an age of platforms and complex interdependent development environments.

The development of design and process management has moved out of the tool companies, providing a welcome neutrality for the solutions. But more than that, they have to cover a wider range of activities than any one tool company can offer. That said, many traditional EDA companies are now working in the areas of IP and software development.

Dassualt, after a series of strategic acquisitions, has assembled and developed a comprehensive suite for managing product development. Indeed, I worked for Synchronicity, the original developer of their DesginSync, back in 2000. Dassault acquired that technology when they merged with MatrixOne. On the other end of the spectrum they acquired Pinpoint, used for managing product development, in their merger with Tuscany.

Last week at the Enovia user group meeting in Mountain View I received an update on the Dassault capabilities. Michael Munsey, Dassault’s Director of Semiconductor, Software and IoT Strategy for the Enovia solutions, opened the meeting with an overview of the present day need for the Enovia solutions. In today’s designs, IP is used extensively. IP can be developed internally or externally, but it is important to know its pedigree. Michael cited an example of an export restricted IP that had been used by a design group, which then made available their project as IP for others to use. But the new IP was not marked as export restricted. You can imagine how painful this turned out.

Michael also recalled the days when IP ‘management’ consisted of getting representatives from different groups in a room and doing a show of hands regarding IP use and proliferation. A host of problems can arise: improper royalty billing, missed fixes for critical issues, improper verification flows, etc.

One of Dassault’s main points was that all verification should be tied to a product design specification. And, when specifications change then the verification steps need to be changed to reflect that. A good example of where product verification must be tied to product specification is with ISO 26262, the automobile functional safety standard.

The Enovia tools make the process straightforward by employing a web interface. But their software is designed to be flow aware. Pinpoint can read tool output reports to capture critical metrics on designs. I was impressed to see that the list of things it can capture includes path timing, power, IR drop, and more. Pinpoint is smart enough to read in LEF/DEF so key design status information is made available in a web interface without the need to open up specific design tools, or more importantly expose design data files. Multi-site and multi-company projects can have independent development work, and all the key information in project status is easily shared without exposing the design data itself.

With the advent of more and more platform based designs and the growth in the need for system integration skills, it looks like Dassualt’s Enovia line will be attracting a lot of attention. For more information on the Enovia user group meeting and Dassault’s offerings in this space click here. It was also heartening to see that a few folks who I worked with there in R&D and application support are still there, 15 years later.

Also Read

Talking Directly to EDA R&D

A Systems Company Update from #52DAC

Design Collaboration, Requirements and IP Management at #52DAC

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New Sensing Scheme for OTP Memories

New Sensing Scheme for OTP Memories
by Paul McLellan on 09-22-2015 at 7:00 am
Categories: IP, Kilopass Technology, TSMC

Last week at TSMC’s OIP symposium, Jen-Tai Hsu, Kilopass’s VP R&D, presented A New Solution to Sensing Scheme Issues Revealed.

See also Jen-Tai Hsu Joins Kilopass and Looks to the Future of Memories

He started with giving some statistics about Kilopass:

  • 50+ employees
  • 10X growth 2008 to 1015
  • over 80 patents (including more filed for this new sensing scheme)
  • 179 customers, 400 sockets, 10B units shipped

Kilopass’s technology works in a standard process using antifuse, causing a breakdown of the gate-oxide. Since the mechanical damage is so small it is not detectable even by invasive techniques, unlike eFuse technologies where the breaks in the fuse material are clearly visible by inspection. Over the generations of process nodes they have reduced the power by a factor of 10 and reduced the read access time to 20ns. Since the technology scales with the process, the memory can scale as high as 4Mb. It also is low power and instant-on.

Kilopass has focused on 3 major markets:

  • security keys and encryption. This only requires Kb of memory. The end markets are set-top box, gaming, SSD, military
  • configuration and trimming of analog. This also requires Kb of memory. End markets are power management, high precision analog and MEMS sensors
  • microcode and boot code. This requires megabits to tens of megabits. Applications are microcontrollers, baseband and media processors, multi-RF, wireless LAN and more

The diagram above shows how the programming works. There are two transistors per cell. The top one remains a transistor for a 0 (gate isolated from the source/drain) but after programming a 1 the oxide is punched through and the gate has a high resistance short to the drain. Since the actual damage to the gate oxide might occur anywhere (close to the drain or far from it), the resulting resistance is variable.

The traditional way to read the data is as follows. The bitline (WLP) is pre-charged, then the appropriate wordline (WLR) is used for access and the bitline (BL) is sensed and compared against a reference in the sense amp. Depending on whether the “transistor” is a transistor or a resistor, the current will be higher than the reference bitline current or not. If it is higher then a 1 is sensed, lower and a zero. The challenge is to sense the data fast, since the longer the time taken, the clearer the value, but all users want a fast read time. See the diagram below.
Historically this has worked well. In older nodes, the variations are small relative to the drive strengths of the transistors. But increasingly it gets harder to tell the difference between a weak 1 cell and an noisy 0 cell, which risks misreading the value. As a result it can take a long time to sense “to be sure.” As we march down the treadmill of process nodes, like many other things, the variation is getting so large it is approaching the parameters of the device itself. A new approach is needed.
The new approach the Kilopass have pioneered adds a couple of steps. Once the word line is used for access, after a delay the bitline reference is shut off. The bit line is sensed and the data latched and then the sense amp is shut off. The new sense amp incorporates the timing circuitry. The whole scheme is more tolerant of process variation and should be suitable for migration all the way to below 10nm. This approach is more immune to ground noise and has greater discrimination between weak 1 and noisy 0. Finally, shutting off the sense amp at the end saves power.
It turns out that this scheme works particularly well with TSMC’s process since their I[SUB]ref[/SUB] spread is half that of other fabs. The new sensing scheme coupled with tighter cell means doubling the read speed.

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The Cost Challenge has Been Met – Let the Disruption Begin!

The Cost Challenge has Been Met – Let the Disruption Begin!
by Alex Lidow on 09-22-2015 at 12:00 am
Categories: EDA

Displacing the Silicon Power MOSFET with eGaN® FETs
35 years ago the silicon power MOSFET was a disruptive technology that displaced the bipolar transistor – and a $12B market emerged. The dynamics of this transition taught us that there are four key factors controlling the adoption rate of a new power conversion technology:

  • Does it enable significant new applications?
  • Is it easy to use?
  • Is it reliable?
  • Is it VERY cost effective to the user?

All four factors have been met with Efficient Power Conversion’s (@EPC_Corp) gallium nitride (#GaN) products. Let’s review the work that has been done over the past five years to address the first three key factors – it is the fourth question, competitive pricing, that is the focus of this article.

Does it Enable Significant New Applications?
As with all new technologies, enabling applications that otherwise go unrealized is the best starting point for introducing the technology. With new applications, the need for increased performance justifies the higher pricing that usually accompanies the introduction of a new technology into the market; so too with gallium nitride semiconductors.
Since their introduction five years ago, eGaN® FETs have fostered the development of several new applications, including wireless power transfer,envelope tracking, LiDAR (Light Distancing and Ranging), X-Ray-in-a-pillcolonoscopies, and wirelessly powered artificial hearts. Beyond applications dependent upon power transistors, gallium nitride technology is now being applied to integrated circuits (IC) – both analog, and in the future, digital. These IC products enhance the performance and cost competitiveness of existing products and new, unforeseen applications are rapidly emerging.

Is it Easy to Use?
eGaN® transistors from EPC are designed to be used in a similar fashion to existing power MOSFETs, and therefore power systems engineers can use their design experience with minimal additional training.

However, to assist design engineers up the learning curve, EPC has established itself as the leader in educating the industry about gallium nitride devices and their applications. As a matter of fact, in addition to publishing over 75 technical articles and presentations, EPC has published four GaN transistor textbooks (including one in Chinese).

To assist practicing power design engineers, EPC has conducted “hands-on” daylong seminars in major electronic industry cities around the world, such as San Jose, Boston, Shanghai and Tokyo. EPC is actively engaged with more than 30 universities around the world in order to lay the groundwork for the next generation of highly skilled power system designers being trained in getting the most out of eGaN® FETs.

Is it Reliable?
Reliability testing of GaN transistors continues to accumulate with positive results. eGaN® FETs have been subjected to a wide variety of reliability tests for device qualification, including High Temperature Reverse Bias, High Temperature Gate Bias, High Temperature Storage, Temperature Cycling, High Temperature High Humidity Reverse Bias, Autoclave, and Moisture Sensitivity.

Acceleration factor tests have been conducted over voltage and temperature in order to estimate the time to failure within the datasheet operating range. Under both HTRB and HTGB type stress conditions, the mean time to failure (MTTF) well exceeds 10 years at maximum operating temperature and at critical voltage levels.

These studies have further shown that eGaN® FETs are able to operate with very low probability of failures within the reasonable lifetime of end products manufactured today.

Is it Very Cost Effective to the User?
For emerging technologies, competitive pricing with well-established technologies is a formidable challenge, especially if the new technology aspires to be a disruptive, displacement technology. And with the latest family of eGaN® FETs, the competitive price barrier has been crossed – now the performance of GaN at the price of a MOSFET is a reality! Here is how competitive pricing was done:

  • Reduced production costs – eGaN® FETs are production based upon MOSFET fabrication methods and equipment. Benefiting from the learning curve of the last five years, yields have increased to the point of being comparable with MOSFET yields, production methods have been streamlined and, thus, the cost of producing GaN devices has dropped substantially.
  • Chip scale packaging – typical MOSFET plastic packaging represents about 50% of the cost of the final product. Low voltage eGaN® FETs are “package-less,” thus cutting the cost for production by that 50%! In addition, without a package the possibility of field failures due to poor assembly are greatly reduced.
  • Extremely small size – faster switching translates into smaller size, higher efficiency, and lower system cost. For example, the latest family of eGaN® FETs is about one-fortieth the area of equivalent MOSFET component.


Conclusion
There’s no stopping gallium nitride technology now – all four key factors to high volume adoption have been achieved: GaN enables new applications, GaN is easy to use, GaN is reliable, and GaN is competitively priced.

The $12B MOSFET market is right now “fair game” for superior eGaN® FET technology. And, looking to the near future, with the growth in identified end-use applications mentioned about, which are enabled by GaN, the market potential could double by 2020. Longer term, the total available market for GaN technology could reach over $300B, with the inclusion of analog and digital integrated circuits incorporating this high performance technology.

Power conversion is going GaN…those slow to adopt will begin to lose ground.

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Dialog and Atmel, 2 cultures to build 1 successful company ?

Dialog and Atmel, 2 cultures to build 1 successful company ?
by Eric Esteve on 09-21-2015 at 2:00 pm
Categories: Foundries

Consolidation is on-going in semi industry, as we learn that Dialog Semi just announced the acquisition of Atmel. Is it a good news for Atmel, or for Dialog ? Apparently not for the stock market, as Dialog stock went down by 20% within the last few hours… But we can try to look more in-depth at the potential synergy between these two companies’s product port-folio and is such acquisition makes sense when looking at the market segments they target.

In the 1990’s, Dialog was part of Temic (semiconductor subsidiary of Daimler) up to a management buy out in 1998 creating Dialog Semiconductor Plc. It took some time to take the right decision : become completely fabless and focus on high volume consumer products. In 2005, the wireless segment was on it way to become the largest in term of volume, growth and relative semiconductor content per system, and Dialog was delivering 600M Audio-codec IC, the company revenue was about $160M. Within 10 years, Dialog revenue has grown up to $1,150 M or with a 40% CAGR during 2014-2010. The revenue split below shows that most of the revenue is made in the mobile industry, with mixed-signal diversified products : power management, audio and display. Nevertheless, Dialog is also preparing the future offering wireless audio and smart Bluetooth IC.

Dialog CEO is Jalal Bagherli and Jalal was part of the TI ASIC Europe management team in the 1990’s, as was for example former ARM CEO Warren East. Being ASIC FAE with TI at that time, I am not surprised by Jalal (or Warren) success as there were many excellent peoples in this group, excellent in marketing and business… and I learnt a lot!
Being with Atmel in the 2000’s I remember that the company was one of the leaders on the Flash market, but the founder and CEO Georges Perlegos understood that diversification towards Application Specific Products (ASIC and ASSP) was a good move. In year 2000, Atmel had revenue of $2B, more than $1,500M of the revenue was coming from Flash and around $300M from ASIC and AVR microcontrollers. But Atmel not only wasn’t fabless, but was acquiring fab in 2001-2002… George Perlegos didn’t survive to the internet bubble crash effect and the company is driven since 2006 by Steven Laub, a financial industry veteran.

Just one point: I have a huge respect from Georges Perlegos, owner of Flash essential patents and able to start a semi company from scratch and drive the revenue up to $ 2 billion. He just thought that “real men have fab” at the time Atmel should have gone fabless…

Let’s fast forward to 2014 results and port-folio. Atmel revenue is now $1,413M in 2014, for an income of $32M (to be compared with 2014 income of $138M for Dialog). Very interesting is the split by product family: non-volatile memory represents 12% of total NR, or $150M, when Microcontroller weight 70%, or about $1B. Flash product line is almost dead, Atmel is almost fabless, and the Microcontroller segment is, by far, the larger. This segment deserves a definition (from Atmel’s Annual report) as it aggregates wireless radio, touch product family or mobile sensor hub:

Microcontroller. This segment includes Atmel’s general purpose microcontroller and microprocessor families, AVR ® 8-bit and 32-bit products, Atmel ® | SMART TM ARM ® based products, Atmel’s 8051 8-bit products, designated commercial wireless products, including low power radio and SOC products that meet Bluetooth, Bluetooth Low Energy, Zigbee and Wi-Fi specifications, Atmel’s maXTouch capacitive touch product families and optimized products for smart energy, touch button, and mobile sensor hub and LED lighting applications.

We have on one hand a company focusing on mixed-signal IC and the mobile industry and well-managed by Jalal Bagherli (remember the 40% CAGR in revenue for the last five years), realizing over $1B on a very competitive market at the end of the crazy growth priod. Dialog has started to diversify (BTLE, power conversion,…) and think about emerging market like IoT. On the other hand, Atmel has accomplished a complete revolution and built a strong microcontroller product line, from 8-bit 8051 to 32-bit SMART ARM based family (probably the industry best line today), weighting almost $1B. Atmel’s product can address various (any ?) market segments, especially including emerging segments like wearable with microcontroller, wireless and sensors when Dialog knows how to design successful ASSP targeting one precise segment. That’s the type of synergy we can expect to be successful and the product overlap is minimum with BTLE, but selecting Smart Blutooth to target emerging application is rather a smart decision. As usual, the success of this merge will depend on the merge of two cultures.

As far as I can see from their respective annual report, one company has a strong marketing culture (product positionning, target market, are clearly explained…) when the other is clearly financial oriented (you will like the annual report if you like crunching data). The merged company success will probably require that one of these two culture take over…

Eric Esteve from IPNEST –

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The Paradox of Atmel No More

The Paradox of Atmel No More
by Majeed Ahmad on 09-21-2015 at 12:00 pm
Categories: Foundries

Technology pundits said Atmel is one of the best-positioned companies in the Internet of Things (IoT) realm, if not the best IoT company outright. The San Jose, California–based chipmaker boasts an enormous portfolio of microcontrollers and a deep expertise in security and automotive electronics hardware. Yet its underperforming stock price worried many in the industry.

The news about Atmel’s desire to be acquired have been circulating for a few months. And that specific premise didn’t go well with the company’s IoT story. After all, how can one company claim a place in the IoT gold rush and also be willing to give up it autonomy while being an acquisition target?


Atmel: The long journey from EEPROM to IoT

The truth is that IoT is a very broad and fragmented marketplace that is still in an early stage of commercial realization. Meanwhile, margins are getting thinner and competition is getting intense in the cut-throat MCU world. Specifically, in Atmel’s case, which caters to both traditional segments such as white goods and energy meters as well as innovative new segments like medical and wearable devices.

The traditional MCU segments encompass a broad customer base and thinner margins while newer product lines like wearables are taking longer than expected to reach larger volumes. It’s worth noting that Atmel is a midsize chipmaker who is competing with MCU makers like NXP, STMicro and TI that are large semiconductor outfits.

Atmel Goes to Dialog

So, in today’s “buy or get bought” world of semiconductor consolidation, Atmel decided to cash in its IoT prowess at a good price. The U.K.-based Dialog Semiconductor plc has announced that it is acquiring Atmel for a total of $4.6 billion in cash and shares.

Dialog, an analog/mixed-signal power management chip firm, has been making advances toward the IoT universe through low-power wireless products like Bluetooth Smart and ZigBee. Dialog can benefit from Atmel’s digital assets as well as wireless connectivity stacks that the company has been acquiring over the past years.

So Dialog can add its low power expertise to these products and try to quickly expand in the IoT markets such as smart home and wearable devices. An investor projection claims that Dialog and Atmel will have nearly $2.7 billion in combined annual revenue and complementary products for connectivity and automotive segments.


Jalal Bagherli: The IoT ambitions

Atmel’s long technology journey that it started 21 years ago is coming to an end at the beginning of the IoT arena. The chipmaker from San Jose is now passing its IoT baton to Dialog that has ambitions of its own. Dialog, who has been a huge beneficiary of the popularity of mobile devices like smartphones and tablets, is now eyeing the next frontier in portable electronics: IoT and wearable devices.

From EEPROM to IoT

In 1984, Atmel was founded on George Perlegos’s groundbreaking work on electrically erasable programmable read-only memory or EEPROM. The Greek-born Perlegos was also part of the team at Intel that had developed the first cell-based flash memory chip.

Atmel began to develop memory chips for niche markets like cellular handsets. It quickly drew attention from OEMs—especially mobile phone makers like Ericsson, Motorola and Nokia—for designing chips that consumed less power than rival memory chips.


George Perlegos: The quiet man who built Atmel

Atmel also got noticed for spending nearly 50 percent of the revenue on research and development at a time during the mid-1990s when the industry norm hovered around 35 percent. Atmel’s low-key boss Perlegos gave a lot of independence to key engineers and helped develop a talent-centric company culture.

Atmel went public in 1991. Eventually, Perlegos took Atmel into programmable logic and application-specific standard product (ASSP) markets while successfully targeting the growing market niches. It worked quite well, for a while. In 2008, Steve Laub, a former Lattice Semiconductor executive, took the helm at Atmel after a boardroom battle.

Laub began a major strategic shift toward microcontrollers that subsequently laid the ground for Atmel’s big bet on IoT. Connectivity, especially wireless connectivity, became the new mantra at Atmel. And that wireless connectivity is now serving as the glue between Atmel and Dialog.

Also read:

4 Reasons why Atmel is Ready to Ride the IoT Wave

Atmel’s L21 MCU for IoT Tops Low Power Benchmark

Atmel Tightens Automotive Focus with Three New Cortex-M7 MCUs

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What is Casio’s Strategy for Smartwatch

What is Casio’s Strategy for Smartwatch
by Pawan Fangaria on 09-21-2015 at 7:00 am
Categories: General, Mobile

Although many traditional watch smarties have remained in business since centuries, Casio can be attributed to be the modern dark horse of digital watches who entered the watch market in 1974 when the wave of digital watches had just started; not many could survive for long but Casio is still there in that segment. Casio had gathered right expertise from its pocket calculator technology which was applied for digital watches with LCD displays. Its first model, “CASIOTRON” displayed the complete time from a second to a day of the week and month including calendar with automated adjustment between day and date of the month. Subsequent models added features like phone and address books, notepad etc. Casio’s philosophy is not to simply add technology to do the same thing differently, but add value through technology which helps user to do things easily and comfortably. To add value in a watch per se, durability, toughness, materials, waterproofing etc. have been some of the basic criteria for Casio.

Casio would be developing a smartwatch soon, but before talking about that let me ponder over what Casio did so far in watch business in the context of smartwatches. This will throw some light on their thinking pattern which aligns with their strategy on smartwatch business. Casio didn’t develop a smartwatch by the definition of being ‘smart’ in today’s context, but it has a ‘watch smart’ mind and blood in its organization from the beginning. This is visible from their watches developed decades ago which had features in no way inferior to what we see in smartwatches today.

Here is a GMW-15 MOON GRAPH (1989) which shows sunrise and sunset times and different phases of the moon. And there is another model from Vivcel VCL-100S series (1994) which vibrates when your mobile phone gets a call. It has an antenna that detects the calls. There are other Casio models which used infrared to control electronic gadgets such as TVs. The infrared radiation in some models could also be used to measure temperature of objects. Even there were UV sensors in some watches which could help you keep your skin safe from sun.

See these later models which came out in 1999-2000. They have GPS, voice recording and play functionality. Some models had compass to determine direction, some others had MP3 player for music lovers. There were models having digital cameras too. Casio’s HBX series had even infrared PC link to transfer data to and from the watch. The infrared technology was even used to play games over some Casio watches which could connect with each other.

Are you thinking there were no models for fitness and health monitoring from Casio? Of course, in 1990s there was RPS-100W which measured your fat burnt, BP series for blood pressure monitoring, and JC-11 series for fitness tracking, and so on.

From these kinds of models from Casio’s home, it’s clear that Casio already has a concept of what should go into a smartwatch. Then the question arises – why these watches didn’t pick up in the market? Not many people around the world were tech-savvy on watches, rather they admired traditional watches. So, Casio focused on analog models of watches after their plunge in digital and tech-savvy watches like the above. We see great analog models like ‘Titanium Oceanus’ from the house of Casio. While tech awareness among traditional watch wearers definitely is a reason for poor sales of these great tech watches, I would also attribute it to feeble marketing effort made by Japanese companies in general. People need awareness, coaching, and even hand-holding to get familiar with new tech stuff; they don’t realize they wanted this unless they are made aware about it and actually allured to feel it doing themselves. This is where Apple makes a big difference; first they combine the stuff together (hardware and software for a host of features) and present it in the most intuitive and usable form, and then they do huge marketing about it to make people aware and familiar with the product and technology in it, and provide good service. Probably this could be the reason, most original innovators get locked behind and others take over them in the actual business when the technology picks up.

On the popularity chart, Casio’s G-Shock models became very popular and they saw huge sales in 1990s. After the sales picked up in mid 1990s, almost hundreds of models or more were released every year for several years from 1997 onwards. They carried the tag “Triple Ten”; that means 10 year battery life, 10 bar water resistance, and 10 meter fall survival. Now that concept made G-Shock’s entry into several segments of people with tough job assignments such as police, fireman, diver, astronaut, mountaineer, soldier, and so on. There were particular G-Shock models classified for NASA space travel.

The fist G-Shock model was DW-5000 launched in 1983 and since then 1000s of G-Shock models were introduced in the market. Going by tech quotient, GWS-900 was launched in 2004 which had contactless IC chip for making payments. Bluetooth notification was introduced in G-Shock models in 2011 and after a few years Gear STB-1000 was released which could connect with fitness apps on iPhone. You can imagine, with iPhone it can have other notifications as well. It can last two years on a single battery and has 100 meter water resistance. It connects with Wahoo fitness app which can pair with a heart rate monitor. Wow! It has features which a smartwatch, by today’s definition should have. So, that makes a wealth of experience for Casio to jump into the fray for next generation smartwatch!

Casio is preparing to launch its first true smartwatch by 1[SUP]st[/SUP] quarter of the coming year, i.e. 2016. According to Kazuhiro Kashio, the present president of Casio company (previous president being his father Kazuo Kashio and his late uncle Toshio Kashio as co-founder) the smartwatch they bring will be a watch that tries to be smart, rather than a smart device that is also a watch. Clearly this statement reflects the sentiments expressed in my last article “Smartwatch – A Tough Puzzle to Crack” where the primary consideration was sought to be on the watch rather than the technology. The technology is essential, but that should act as a good support vehicle to realize the functions which a smartwatch should have; it shouldn’t overwhelm the watch itself. Hope Casio defines the smart functions which the smartwatch users will love and nourish for many years. For now, we hear Kashio commenting on the basic features that a smartwatch should possess, e.g. durability, simplicity, light weight, right size and shape, comfort, appearance, feel good factor etc.

Casio is working on the smartwatch since about four years and have experimented through several prototypes. Kashio says his smartwatch will have great functions as well as great appearance that will target sportsmen as well as people in other walks of life. The smartwatch will not compete on price point but on features, appearance and what a smartwatch should have. Its price is expected to be in the range of $350-$400 and will compete with Apple watch.

Being realistic and having read the pulse of people over the years, Kashio is conservative on the smartwatch sales. He is not expecting an instant success in the smartwatch market, but is determined to grow it in the long run. Does that mean next generation of people will be the ones who would embrace smartwatches? Let’s see what Casio’s long time experience in digital-cum-traditional watch industry brings up for smartwatches.

Also read: Smartwatch – A Tough Puzzle to Crack

Pawan Kumar Fangaria
Founder & President at www.fangarias.com

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IEEE S3S Rump Session: “What Does IoT Mean for Si Technology?”

IEEE S3S Rump Session: “What Does IoT Mean for Si Technology?”
by khaki on 09-20-2015 at 12:00 pm
Categories: EDA

For the second year in the row, Gartner’s Emerging Technologies Hype Cycle puts Internet of Things (IoT) at the Peak of Inflated Expectations. Not only many online forums are inflated with debates on IoT-related topics, but more importantly virtually all semiconductor companies made announcement pertaining their plans to address this potentially massive market. With the internet of people reaching a plateau, IoT is considered by many as a new wave for the continued growth of the semiconductor industry.

However, apart from vague discussions related to the system cost or long battery-life requirements, little is discussed on the implications of IoT on wafer manufacturing and chip design. The fact that legacy CMOS technologies in fully amortized fabs are advertised as the solution to IoT market to lower the leakage current at the same time that leading edge technologies, mainly 28nm, are being tweaked to lower the cost and active power, is a testimony to the existence of a wide range of opinion regarding IoT requirement. This is in part due to the extremely wide range of complexity that one can imagine for IoT: from a simple egg-counter in the fridge to a system that understands human emotions.

A smartphone plus its user (even a toddler) can be viewed as a smart IoT node where the user provides a very wide range of computing capability. However, this smart computing power is beyond the capability of many classical IoT nodes being discussed today. The ultimate application of IoT can be unlocked once such level of smartness is implemented either on the server side or better yet at each node.

At the 2015 edition ofIEEE S3S Conference, we are fortunate to have a diverse panel of experts to cover “What does IoT mean for Si technology” at the Rump Session. The open atmosphere of the session and the participation of an audience that drives the semiconductor technology in R&D, manufacturing, and design as well as academia provide a unique opportunity for debate. I am chairing this year’s panel session and the panelists are:

  • Christophe Chevallier, Ambiq Micro
  • Stanley S.C. Song, Qualcomm Technologies Inc.
  • Ali Niknejad, University of California, Berkeley
  • Norikatsu Takaura, Hitachi

The conference is held Oct. 5-8, 2015 at The DoubleTree by Hilton Sonoma Wine Country. The Rump Session will be held in the evening of Wednesday, Oct. 7th after the conference cook-out. I hope I see many of you at the conference, but if you cannot make it, I am soliciting questions for the panelists. Please feel free to drop me an email or post your questions as a comment.

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7 Deadly Sins in Product Strategy for EDA Startups

7 Deadly Sins in Product Strategy for EDA Startups
by Bernard Murphy on 09-20-2015 at 7:00 am
Categories: EDA

If you google “7 deadly sins of startups” you get lots of hits on mistakes for social networking ventures, only a few of which are relevant to EDA startups. In EDA you have to demonstrate real growth quickly with a very tech-savvy audience in a handful of bluechip accounts. So throw away the research you did on the web because it isn’t going to help. Success is still possible though if you avoid some of the following blunders. I’ve committed a few myself and have seen up close the anguish of the others.

1.The “me-too” product
It’s amazing how often would-be entrepreneurs look at a successful product in the industry and think “hey, I could do that too”. This is a huge warning sign that you don’t have an original idea and that your differentiation will at most be in quality of result. The first problem is obvious. The second is a delusion unless you can prove 10X superiority over market leaders. That requires a fundamentally different approach, (aka an original idea). Why isn’t 3X good enough? Because everyone knows at least some of that advantage will evaporate in a production environment and 1.5X – 2X isn’t enough to justify a switch from a leader who’ll almost certainly catch up and who already provides bundled pricing and local support. (And don’t even think you’re going to compete on cost, unless you’re a Walton.)

If you don’t have an original idea, think harder or find a partner who does have an original idea.

2.The “one-customer” product
This is deceptively easy to fall into but equally dangerous. You have a good contact at a major account, you build a custom product and they’re happy with the result. They swear everyone in the industry is going to need this. But any single customer is a terrible judge of the general market because they’ve seen very few flows. What you built is unlikely to translate to another design team, much less another account. Above all, do not get dragged into “integration products” (build me a flow). These never translate, even within a company.

Service companies often fall into this trap. Some products developed in services make the transition to general application, but not many.

Check with multiple prospects in multiple companies and dig deep before you decide you’ve found a trend. Don’t cling to the first positive thing you hear as validation – make sure you get the whole response, warts and all.

3.The “nice-to-have” product
You found general agreement that your product would be useful but is it essential? Is solving this problem their organization’s priority 1 or 2? Unless you hear a resounding YES, they’re grading this a nice-to-have product, which they’ll never buy. Avoid building stuff to improve productivity. Vitamins are always nice-to-have. And avoid solving short-term problems. If the big guys are promising a solution in a year, forget it (sometimes they don’t come through, but the risk is still too high).

Get multiple independent viewpoints; the majority should grade this as must-have. Don’t be afraid to ask about solutions from competitors. Disqualifying bad ideas quickly is a good thing and you may uncover new ideas.

4.The “one license per account” product
OK, so you found a product that has broad appeal and is an absolute must-have. But only one engineer in the whole company needs it and then maybe only for a couple of months each year. Your total available market just shrank to maybe 40 licenses. Design companies are prepared to pay up to a few tens of $K for an EDA product, even if it cures cancer. That may give you an interesting lifestyle company, but an exit is out of reach given lack of room to grow.

A product has to be able to grow to at least multiple 10’s of seats if not 100’s of seats per account. Check that your customers agree your product could do this. (Engineers are often scared to ask customers this kind of question. Don’t be. Reasonable customers expect well-run startups to size the opportunity.)

5.The “revolutionary as long as you radically change your design flow” product
This was one of my sins – I built a product around IP-XACT design creation. Looked good because IP-XACT is an industry standard and several other companies were already on-board. But for others adoption required ditching RTL-based design at the SoC level and switching to IP-XACT-based design. That’s a huge change. Design teams look for incremental flow changes; tight schedules make major changes too risky. There are exceptions (when a team can start from scratch) but you can’t build a viable business on exceptions.

Run, don’t walk away from anything that requires a radical shift in methodology. Even SystemVerilog allowed for incremental adoption.

6. Uncritical love for your product
Passion for your creation is essential but it can also blind you to problems, especially deep problems in translating the concept to user needs. You can’t rely on your team or prospects to tell you your baby is ugly; your team wouldn’t dare and prospects would rather avoid conflict (at least before they have bought). Absent critical feedback you fail to see the need for major course corrections and your business mysteriously evaporates.

You need to decide early on if you want to be right or you want to be successful. You probably can’t have both. Recruit an independent advisor whose job is to tell you what you don’t want to hear and can contribute to discussions on corrective action.

7. Confusing cost with opportunity cost
It’s important to be frugal when running a startup, but there are limits. Reinventing commodity components (netlist/RTL readers and GUIs are two obvious examples) will tie up resources for much longer than you think and will ultimately cost more in slower progress on real differentiators and lost goodwill than you would have spent on off-the-shelf solutions

Never forget you are in a race to demonstrate differentiated product traction with key customers within 5 years. Wasting any of this effort on reinventing commodity functionality you could have bought (or partnered to get) is crazy.

It’s possible you could defy one or more of these guidelines and still have a winner. But then you’re betting against the house. Maybe you’ll win, but I doubt you’ll find investors.

More articles by Bernard…