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Xilinx on ANSYS Elastic Compute for Timing and EM/IR

Xilinx on ANSYS Elastic Compute for Timing and EM/IR
by Bernard Murphy on 08-20-2019 at 5:00 am
Categories: Ansys, Inc., EDA, FPGA, Xilinx

RedHawk-SC

I’m a fan of getting customer reality checks on advanced design technologies. This is not so much because vendors put the best possible spin on their product capabilities; of course they do (within reason), as does every other company aiming to stay in business. But application by customers on real designs often shows lower performance, QoR or whatever metrics you care about than you will see in ideal claims, not because the vendor wants to mislead you but because they can’t quantify the inefficiencies inherent in live design environments. That’s why customer numbers are so interesting; they reflect what you’re most likely to see.

ANSYS has already hosted webinars with customers like NVIDIA and others talking about the benefits of big data/elastic compute in optimizing power integrity, EM and other factors for their designs. In a recent webinar Xilinx added their viewpoint in looking for scalability in analysis for their designs at 7nm and beyond, particularly in use of SeaScape, RedHawk-SC and Path FX. Why they felt the need to do this becomes apparent when you see some of the stats below.

The customer presenter for this webinar was Nitin Navale, CAD Manager at Xilinx responsible for timing analysis and EM/IR. He started by explaining a little about their architecture to give context for the rest of the discussion. The top-level of a die is made up of between 100 and 400 fabric sub-regions (FSRs), each of which contains between 2500 and 5000 IP block instances. A packaged part may contain one or more die in a 2.5D configuration on an interposer. In this context, analysis for timing, EM and IR is first at the die level and then across die in a multi-die package.

SeaScape

The first application Nitin discussed was STA. Surely this will all be managed by the standard signoff timing tools? It seems the days of full-flat STAs are behind us and would be pointless anyway for the kind of analyses Nitin and colleagues need. So you have to strip away all but a select set of logic for analysis, but he told us that even after stripping back to a single FSR an STA run would not complete. The problem here is apparently that in Xilinx designs you may have to blackbox (BB) millions of instances; all those BB boxes and pins still consume too much memory.

What they wanted was not just to BB millions of instances but remove them and floating nets completely. Xilinx programmed this operation in Python on top of standalone SeaScape. Remember their first test kept a single FSR, with everything but blocks of interest BBed, and that wouldn’t complete in STA. They ran their SeaScape script (taking just over 6 hours) then STA completed in 12 hours per corner. A medium-sized design (33 FSRs retained) after stripping back in SeaScape ran through STA in 4 days per corner. (Nitin also talks about running Path FX trials here, which ran much faster than the equivalent STA. I’ll touch on that tool below.)

Now you could do all this fancy stripping in the reference timing tools but not very quickly. There’s nothing intrinsically parallelizable about Tcl scripts and even if you do some very clever scripting you would have to make sure those scripts wouldn’t get confused on overlapping paths. SeaScape takes care of all this by directly managing map-reduce and compute distribution. Pretty neat that Xilinx were able to use SeaScape to make 3rd party tool runs viable.

RedHawk-SC

Next up, Nitin talked about their trials with RedHawk-SC (the SeaScape-based version of RedHawk) for EM and IR analysis. Here they have the same scale problems as for STA except that RedHawk-SC has SeaScape built-in so can natively work at full-chip scale. He mentioned that when they were doing analysis on Ultrascale back in 2015, they had to break the design into 7 partitions. It took one person-month to do the initial analysis and one person-week to do an iterative run with ECOs. On the Versal product (2018) this jumped to five person-months on the initial run and five person-weeks per iteration. Clearly this won’t be scalable to larger designs which is why they started looking at the ANSYS products.

Nitin shared preliminary data here. In both the small and mid-size experiments, run-time was reduced by 3X on the small job and 10X bigger job and they saw good correlation between RedHawk and RedHawk-SC results. Nitin said they’ve seen enough already – they’ll be deploying RedHawk-SC on their next chips. Also interesting, the RedHawk (not SC) runs need a machine with almost 1TB of memory. RedHawk-SC distributed to worker machines needing only 30GB of memory per machine. Worth considering versus when you’re thinking about requesting more expensive servers.

Path FX

Nitin wrapped up with a discussion on their trials on Path FX, ANSYS’ Spice-accurate path timer. In the SeaScape trials I mentioned earlier, Path FX was running 4X faster than STA on the mid-size design, already notable. Of course you don’t switch to a different reference signoff of that importance based on a couple of tests, but Xilinx have another application where Path FX looks like a very interesting potential fit. In Vivado (the Xilinx design suite) it would be impossibly expensive to re-time a compile each time so the tool uses lookup tables for combinational paths. Populating those lookup tables is something Xilinx calls timing capture, and requires that paths be timed independently. While some parallelism is possible through grouping, this can become complicated on a reference STA tool and still only runs on a single host even with multi-core and multi-threading. Apparently resolving path overlaps further reduces performance.

Path FX however can take advantage of the same underlying elastic compute technology, intelligently distributing paths to workers and calculating pin-to-pin delays simultaneously, even on conflicting paths. And it’s more accurate than Liberty-based timing since it’s closer to Spice. They again ran a trial on a single FSR-based design. Compile was 4X faster and timing was 10X faster, compared with STA running fully parallelized. Correlation was also pretty good, though Nitin cautioned they (Xilinx) made a mistake in setting up the libraries. They have to correct this and re-run to check correlation and run-time. However he likes where this number is starting, even if it might be a bit wrong.

Overall, pretty compelling evidence that the elastic compute approach is more widely effective than parallelism in accelerating big tasks. You can register to watch the full webinar HERE.

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Digging Deeper in Hardware/Software Security

Digging Deeper in Hardware/Software Security
by Bernard Murphy on 08-19-2019 at 10:00 am
Categories: Events, IP, Security, Tortuga Logic
2 Comments

When it comes to security we’re all outraged at the manifest incompetence of whoever was most recently hacked, leaking personal account details for tens of millions of clients and everyone firmly believes that “they” ought to do better. Yet as a society there’s little evidence beyond our clickbait Pavlovian responses that we’re becoming more sensitized to a wider responsibility for heightened security. We’d rather ignore security options in social media, in connecting to insecure sites or in clicking on links in phishing emails, because convenience or curiosity provide instant gratification, easily outweighing barely understood and distant risks which maybe don’t even affect us directly.

This underlines the distributed nature of security threats and the need for each link in the chain to assume that other links may have been compromised, often by the weakest link of all – us. Initial countermeasures, adding a variety of security techniques on top of existing implementations, proved easy to hack because the attack surface in such approaches is huge and it is difficult to imagine all possible attacks much less defend against them.

Hardware roots of trust are the new “in” technology, stuffing all security management into a tightly guarded center. Google now has their Titan root of trust for the Google Cloud and Microsoft has their Cerberus root of trust, both implemented in hardware. These aren’t marketing gimmicks. A security flaw discovered this year in baseboard management controller firmware stacks and hardware allows for remote unauthenticated access and almost any kind of malfeasance following an attack. When a major cloud service provider is hacked and it wasn’t clearly a user problem, the reputational damage could be unbounded. Imagine what would happen to Amazon if we stopped trusting AWS security.

However – just because you built a hardware root of trust (HRoT) into your system, that doesn’t automatically make you secure. Tortuga Logic recently hosted a webinar in which they provided a nice example of what can go wrong even inside an HRoT. This is illustrated in the opening graphic. An AES (encryption/decryption) block inside the HRoT first reads the encrypted key, decrypts it and stores it in a safe location inside the HRoT in preparation for data decryption. To decrypt data for use outside the HRoT two things have to happen: the data has to be run through the AES core and the demux on the right has to be flipped from storing internally to sending outside. Makes sense to flip the switch first then start decrypting, right?

But realize that the state from the key decryption persists on that path until other data is run through the AES. If you flip the demux switch first, the plaintext key can be read outside the HRoT. Oops. A seemingly reasonable and harmless software choice just gave away your most precious secret. Why not hardwire this kind of thing instead? Because for most embedded systems users expect some level of configurability even in the HRoT (which areas of memory should be treated as secure for example). You can’t hardwire your way out of all security risks and even if you tried, you’d just replace possibly firmware-fixable bugs with definitely unfixable HW bugs.

Bottom-line, to run serious security checks, you have to check the operation of the software on the hardware. Like for example booting Linux on the hardware. But how do you figure out where to check for problems like this? And how do you trigger such cases? A standard software test probably won’t trigger this kind of problem. Exposing the problem likely depends on some unusual event which might happen almost anywhere in the hardware + software stack, making it close to impossible to find.

The Tortuga approach using their Radix tool takes a different approach. It runs within your standard functional simulations/emulations, looking for sensitizable paths representing potential security problems. These are captured in fairly easy to understand security assertions, not SVA but assertions unique to the Tortuga tools (they can help you develop these if you want the help).

I like a couple of things about this approach. First, the collection of assertions represents your threat model for the system. Which means that once you understand the assertions, which in my view have a declarative flavor, you can easily assess how complete that model is, rather than trying to wrap your brain around all the details of the RTL implementation and how it might be attacked.

Second, this runs with your existing testbenches. You don’t need to generate dedicated testbenches, so you or your assigned security expert can start testing immediately and regress right alongside your functional regressions. A common question that comes up here is how complete the security signoff can be if it is simulation based. Jason Oberg (the Tortuga CEO) answered this in the webinar. It’s not a formal guarantee, but then no known method (including formal) can provide a guarantee for most security threats. However if your testbench coverage is good enough for functional signoff, Radix routinely finds more problems than other methods such as directed testing

Tortuga is already partnered with Xilinx, Rambus, Cadence, Synopsys, Mentor and Sandia National Labs, so they’ve obviously impressed some important people. You can register to watch the WEBINAR REPLAY HERE .

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More Steve Jobs, Apple, and NeXT Computer

More Steve Jobs, Apple, and NeXT Computer
by John East on 08-19-2019 at 6:00 am
Categories: John East

My first meeting with Steve Jobs was in early 1987 when he was running NeXT Computer.  I was a VP at AMD and was hunting for potential customers.  I visited him in the NeXT Palo Alto facility with the objective of selling him some existing AMD products.  He had a different objective:  to get me to produce a new product that we had no plans to make but that he felt he needed for his NeXT machine.

Have you ever noticed that dogs can always tell if a person likes them?  Somehow we humans give off some sort of emanation that every dog can pick up.  You can’t fool a dog.  People are the same in concept,  but less sensitive.  Sometimes we can pick up the emanation,  sometimes not.  It depends on how strong the emanations are.  Well  — Steve Jobs could really emanate!!  You didn’t have to be a dog to pick up Steve’s emanations.  About two seconds after I shook Steve’s hand,  I picked up — this guy doesn’t like me.  He thinks I’m stupid. —  He didn’t say it.  He was cordial enough in a stand-offish sort of way. But there was no doubt!!  But don’t feel badly for me. I didn’t feel alone.  In the course of that meeting I found out that Apple was stupid too. And John Sculley.   And anything to do with IBM/Microsoft.  So  — at least I was in good company.  But here’s my take: he was very, very smart.  He’d gone to a liberal arts college for one semester and then dropped out.  He’d never had a day of formal training as an engineer.  Yet  — I could barely keep up with him as he was describing the technical job that he was trying to get done.

The second meeting was not that pleasant.  I told him that we had decided not to make the part that he wanted.  That didn’t please him and he said so.  He let me know in clear terms that I was not making a smart decision.  He also let me know that stupid decisions were made by stupid people.  QED.  He might have been right.  In fact, as I look back on it,  he probably was right.  Rich Page was in those meetings too.  Rich was once a fellow at Apple and was now one of the NeXT technical gurus.  Rich and I had lunch the other day  (See the attached picture). We couldn’t remember exactly what Steve was asking for,  but we could guess well enough to agree that it probably would have been a good product.  Oh well. Still — even though I was never comfortable with Steve, I was in awe of the guy.  He was smart, rich, and good looking.  When it suited him,  he could really turn on the charm! I thought that if he could come up with a little better way of dealing with people that he could own the world.  You know what?  He did.

Sculley ran Apple until 1993.  It wasn’t easy!  Selling personal computers was nothing like selling mainframes, but it was also nothing like selling soda pop.  It was a tough combination of the two.  The company languished and Sculley was eventually fired. Mike Spindler took over briefly.  Spindler was replaced by Gil Amelio who had been running National Semiconductor.  One of the movies that was made about Apple did a not very favorable depiction of Gil.  That was wrong!  Gil and I worked together at Fairchild back in the 70s.  I love Gil Amelio.  I think he’s a really, really good guy.  Smart.  Hard working.  Good with people.  Unfortunately Steve Jobs didn’t see it that way.  Why did that matter?  Because Amelio decided to buy NeXT computer and when he did, he brought Jobs back as an advisor.  No good deed goes unpunished.  Within a year Gil was out and Steve was back in power.

Steve Jobs was more than just a technologist.  In fact, he wasn’t really a technologist at all.  But,  as Laurene Jobs said, Steve could see what wasn’t there and what was possible.  A great example of this is the IPod.  In 2000, Toshiba announced a new, very small form factor hard drive with a 1.8 inch diameter platter.  Jobs saw it at roughly the same time that everybody else did,  but his mind put the pieces together better and faster than anyone else.  When he put the pieces together, he saw a music player.  A year later, in 2001,  the IPod was born. Soon it seemed as though every teenager in America had an IPOD.  I had one too and I was nowhere near to being a teenager.  The Ipod was a huge win!!

And yet a third example?   The MAC,  the IPod  and then????   —  The IPhone!!  People wanted to be on the web from wherever they happened to be – not just from their office.  And they wanted to do it without having to work hard at it  — that is,  they wanted a really simple GUI on a big,  easy to read screen.  It wasn’t there.  But it could be.  Apple didn’t invent dual touch technology.  Apple didn’t invent capacitive sensing. Apple didn’t invent the ARM 11 processor.  But Steve saw what wasn’t there and what could be.  He acted on it.  He won again.  In the neighborhood of two billion IPhones have been sold.

Over a decade or so Apple introduced I-Tunes,  the IPod,  The IPhone, the IPad and finally the IWatch.  All really easy to use.  So easy that even a CEO could do it (My administrative assistant used to use that line all the time) What difference did those products make?  Apple went from a company who was hemorrhaging cash at the time of Gil Amelio’s appointment to a trillion dollar market-cap company. Pretty big difference,  wouldn’t you say?!!

To repeat Laurene Jobs  “Steve had the ability to see what wasn’t there and what was possible.”  How hard could that be? Anybody could do that,  right.? Steve got it right almost every time.  I tried like crazy to do it,  but could never quite pull it off.  One of us must have been a very special person.

I hope it was him!

Next week: the decade that changed the industry.

Pictured:  Above – Rich Page next to Steve Jobs with the other founders of NeXT Computer.

Below – Rich and I having lunch at Don Giovanni restaurant a couple of months ago. If you enlarge the picture you can barely make out some diagrams sketched on the (paper) tablecloth.  That’s what happens when a couple of old engineers share lunch.

See the entire John East series HERE.

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Designing Connected Car Cockpits

Designing Connected Car Cockpits
by Roger C. Lanctot on 08-18-2019 at 4:00 pm
Categories: Automotive

Creating engaging, though not distracting, in-vehicle experiences that enhance driving and maximize safety represents an intimidating and inspiring opportunity for automotive designers – who have already made great strides. The widespread adoption of connectivity means that artificial intelligence in the form of increasingly sophisticated digital assistants are transforming that experience.

Nuance, Affectiva, and Strategy Analytics have proposed a SXSW panel discussion on this topic focused on the revolutionary impact of AI on in-vehicle experiences. We’d like your vote in favor of our presentation proposal.

On Monday, August 5, all ideas received during the open Panel Picker application process for the 2020 SXSW event were posted for the online community to vote on.

Community votes make up 30% of the final decision of what makes the stage at SXSW. Input from SXSW Staff (30%) and the SXSW Advisory Board (40%) is also part of the decision making process and helps ensure that lesser-known voices have as much of a chance of being selected as individuals with large online followings. Together, these percentages help determine the final programming lineup.  

How to Vote

To participate in the voting process, visit panelpicker.sxsw.com/vote and login or create an account. Each voter can vote once per proposal – selecting “arrow up” for yes or “arrow down” for no.

Nuance, Affectiva, and Strategy Analytics’ session can be found here: https://panelpicker.sxsw.com/vote/104568

Thank you, in advance, for your interest and support. The goal is to make driving safer, more pleasant, more intelligent, and more human.

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Hopes of a 2020 recovery but nothing solid yet

Hopes of a 2020 recovery but nothing solid yet
by Robert Maire on 08-18-2019 at 6:00 am
Categories: Semiconductor Advisors, Semiconductor Services

An in line quarter

Applied reported a quarter just above the mid point of guidance and analyst numbers (which mimic guidance) with revenues of $3.56B and EPS of $0.74 with guidance of $3.685B+-$150M and EPS o $0.72 to $0.80, also in line with current expectations. All in all a fairly boring quarter with business bouncing along a soft bottom cycle.

Memory still in decline

Management pointed out the same thing we have heard from others as well as memory companies and that is that memory companies continue to reduce capacity and shipments.  This means that existing tools are being taken off line, and sit idle in the fab, in order to reduce the excess supply in the market.  All this idled capacity is going to be a long buffer on any upturn which will delay purchases of new equipment until all the idled capacity comes back on line first.  We think all this idled capacity, which continues to pile up, to be a significant impediment to new equipment purchases when memory does indeed recover.

Logic/Foundry is better

As we have also hear and reported from Semicon West, the foundry industry has kicked up spend most notably TSMC. The biggest driver there is the roll out of 5G.  However, its clear that the strength of logic alone is not enough to either offset memory weakness or spark a logic driven up cycle.

Display is weaker

Display business has been weaker and is expected to move down a bit more.  We don’t expect a near term recovery in display given the weakening overall consumer market

Execution and returns remain good

Overall financial performance remains very disciplined and we see good shareholder value return in buy backs.  Gross margin remains better than expected and experienced in previous down cycles.

 The stock

The lack of some inspiring new news and no clear bottom nor clear indication of a recovery (other than pure hope) suggests that there is no real reason to run out and buy the stock.

The story was more or less in line with what we heard from Lam and KLAC so its not like Applied is out performing in any significant way.

In line performance is certainly better than a downward revision to the numbers but management is still not ready to call a “bottom” to the downcycle which suggests that they are not confident either that things will get better any time soon.

The China trade issue just adds to the overall weakness and adds more potential downside versus upside.

The stock is certainly not cheap….with EPS down by almost 50% from roughly a year ago, the stock is not down anywhere near that amount and thus remains at a high valuation for the bottom of the cycle.

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Tensilica HiFi DSPs for What I Want to Hear, and What I Don’t Want to Hear

Tensilica HiFi DSPs for What I Want to Hear, and What I Don’t Want to Hear
by Randy Smith on 08-16-2019 at 10:00 am
Categories: Cadence, IP

It seems every day we see a new article (or ten) on autonomous driving. It is an especially hot topic, and it will happen someday. For now, we can dream about it, and many people are working on it. But for the present, the technology in a car that commands my attention is audio. I’ve been a musician since 4th grade. I still perform occasionally today. I love all types of music. And the one time I can listen to whatever I want is when I am alone in the car. So, when I attended Cadence’s Automotive Design Summit the end of July, the session titled, HiFi DSPs for Automotive Infotainment, had my full attention. Larry Przywara, Cadence’s Product Line Group Director Audio/Voice IP, Tensilica Products, who works in the Cadence IP Group, gave the presentation. So, thank you, Larry, you made my day!

If you live in Silicon Valley, you know we are in our cars a lot. I try to stay off the cell phone, but I need to stay connected. I use CarPlay for that. A feature we didn’t even dream about ten years ago. While I was happy when higher fidelity sound first started appearing in cars (e.g., DTS, DVD-A, etc.), many cars no longer support physical media at all. My phone has over 16GB of music on it, why should I need to fumble with a disc? So, today’s infotainment system needs to support many audio sources including Bluetooth, AM, FM, Digital Radio (HD Radio, DAB, DAB+, DRM…), CarPlay, Android Auto, Sirius XM, MP3 from hard disk, and the list keeps growing.  Most importantly, Cadence HiFi licensees, of which there are well over one hundred, can get support for any the digital terrestrial and satellite radio audio standards because they are all supported on the HiFi Audio DSP.

The presentation also pointed out the new advanced audio/voice features that will be coming to our cars very soon can all be supported on Tensilica HiFi DSPs. These new features include advanced noise cancellation to eliminate road and engine noise, improved speech recognition, audible directional warnings to let us hear the direction we need to be concerned about and even improved in-cabin communications. In-cabin communications? What’s this? Well, today’s SUV drivers need to shout to be heard in the back row – but what if the car could pipe that voice back to the back row for you instead, no shouting needed? Or, how do you like this feature, “sound bubbles”? The adult driver relaxes to soft jazz, while the kids are watching a movie in the back, and the front row passenger is listening to their favorite podcast – and none of them hear the other’s content. Wow, that sounds nice! The power of Tensilica’s DSP technology will be doing all of it.

If you want a real-life example for the over 100 HiFi licensees, look no further than the Samsung Exynos Auto V9 automotive processor. While the chip does employ Arm processors for some of the infotainment features, the audio portion is four Tensilica HiFi 4 DSPs, as seen here. DSP architectures are more suitable for presenting audio and for speech recognition. The advantage of using DSPs is due in part to the low latency characteristics of DSPs, and the high performance of Tensilica DSPs in particular.

Finally, as with any DSP core, you need to have the proper software available as well. Indeed, Cadence’s list of 3rd-party Automotive Partners is impressive and complete. No matter which audio features the car manufacturer, or infotainment OEM wants to provide – a complete HiFi solution will be available.

“Sorry Honey, I guess I will be getting a new car again soon…”

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Chapter 6 – Specialization in the Semiconductor Industry

Chapter 6 – Specialization in the Semiconductor Industry
by Wally Rhines on 08-16-2019 at 6:00 am
Categories: Wally Rhines

Recently, the combined market share of the top ten and top twenty semiconductor companies has been increasing, contrary to the trend of the last fifty years.  Given the acceleration in mergers and acquisitions that began in 2015, one might assume that, as the semiconductor industry approaches maturity, companies are consolidating to increase their competitive advantage through economies of scale.  After all, that’s what many industries, including disk drives and DRAM’s have done in the past.  Closer examination of this trend, however, indicates that semiconductor companies are moving toward specialization rather than just bulking up to increase their revenue.  Let’s look at the top five largest semiconductor companies, where the consolidation is most evident.  The combined market share of these companies has been increasing in recent years as they grow at a 9% compound average growth rate (CAGR) versus a market that grew at 2% CAGR through 2017 (Figure 1). Did they grow by acquisition of other companies?  In general, “no”.

Figure 1.  Increasing combined market share of the five largest semiconductor companies

Despite acquisitions like Altera, Intel’s market share over the period from 2010 to 2016 was flat at about 15.5%. Samsung gained market share during the period, moving from 10.2 to 12.1% but this gain was not caused by acquisitions.  TSMC, the third largest semiconductor company by revenue, grew its market share substantially during the period, rising from 4.5 to 8.1% with no acquisitions.  And Qualcomm’s gain in market share from 3.1 to 4.2% was almost totally driven by the growth of its primary market, wireless telecommunications, rather than any acquisitions. Only Broadcom grew by acquisitions during the period, moving from 0.7 to 4.2% market share.

There were indeed companies that grew economies of scale through acquisitions during the period 2010 through 2016 but they are not a significant share of semiconductor industry revenue.  They include the TriQuint/RFMD merger to form QORVO, International Rectifier/Infineon, On Semiconductor/Fairchild, and Linear Technology/Analog Devices, to name some examples.  Overall data for the industry suggest that there is no correlation between operating profit and revenue, with a correlation coefficient of only 0.0706 (Figure 2).

Figure 2.  Lack of correlation between semiconductor revenue and operating profit of the largest semiconductor companies 2010 through 2016

Figure 3. Texas Instruments operating profit percent

Why then is there an accelerated level of semiconductor mergers and acquisitions in 2015 and 2016?  It turns out that companies that used acquisitions and divestitures to specialize their businesses usually improved operating profit percent more than those who did not.  Texas Instruments is a good example (Figure 3).  When I worked at TI in the 1970’s and 80’s, the company made almost every conceivable type of semiconductor component.  One could say that TI made everything in the semiconductor business except money. Through a series of acquisitions, divestitures and business terminations since the year 2000, TI has focused its business on analog and power components. As a result, TI has progressed from profitability that averaged less than 10% operating profit to a 40% operating profit in 2017, the highest of the major companies in the semiconductor industry.

Figure 4.  NXP Operating margin after adjustment for extraordinary items

NXP is another good example (Figure 4).  In 2014, nearly 30% of its revenue came from “standard products”.  Over the next five years, this percentage became negligible and more than 90% of NXP’s revenue then came from two major areas, automotive and security.

AVAGO is a similar story although the specialization was achieved by an aggressive series of acquisitions (Figure 5). Along with the acquisitions came divestitures resulting in very strong market share in wireless communications and networking, a specialization that was particularly good as “East-West” traffic grew in data centers. In addition, the need for improved wireless communications filters in cell phones accelerated the growth of bulk acoustic wave devices.

Figure 5.  AVAGO specialization through acquisitions

What about companies that did acquisitions in order to grow and diversify their product mix? Intel is a good example of a company that had an extremely high concentration of revenue in the microprocessor business aimed at PC’s and servers (Figure 6).  A series of acquisitions in new areas like McAfee for security, Wind River for embedded software, Altera for FPGA’s, as well as an organic diversification thrust with the foundry business, added to revenue but not to profit.

Figure 6.  Intel diversification versus profitability

Finally, one might wonder whether this high correlation of specialization with profitability came as a result of reductions in research and development, especially when one examines cases like AVAGO where substantial cost reductions followed each acquisition.  If this did happen, it’s not evident for the overall semiconductor industry.  The total R&D investment of the semiconductor industry has grown almost every year in history (Figure 7).

Figure 7.  Semiconductor research and development expenditures with recessions shown in gray

Research and development spending of the semiconductor industry has been relatively constant at 13.8% per year (Figure 8 in Chapter 2).  It appears that the managers and investors in semiconductor companies don’t believe that their industry is consolidating into a slow growth, mature business.  Why would they invest nearly 14% of their revenue each year if they believed that the recent compound average growth rate below 3% was likely to continue?  The semiconductor industry has reinvented itself periodically through history as new applications have evolved.  These new applications have created opportunities for new companies to emerge and for the total industry revenue to grow.  That’s likely to be the case for the foreseeable future.

Read the completed series

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Can a hierarchical Test flow be used on a flat design?

Can a hierarchical Test flow be used on a flat design?
by Tom Simon on 08-15-2019 at 10:00 am
Categories: EDA, Siemens EDA

It is pretty common for physical layout to work from a flattened hierarchy for blocks or even full chips, even though the front-end design starts with a hierarchical representation. This was not always the case. Way back when, the physical layout matched the logical hierarchy during the design process. Of course, this led to all kinds of problems with placement and routing congestion. When the split was made to break hierarchical consistency from the front end to the back end it caused endless headaches. Even today, with most flows ironed out pretty well, there are still pain points in using a flat physical representation. Nevertheless, the advantages outweigh the drawbacks.

At the same time, some operations that were traditionally performed on flat designs have matured and can be done hierarchically for improved efficiency. A good example of this is DFT, where Mentor has introduced its Tessent Hierarchical DFT and Memory BIST solutions.  The obvious advantage is that DFT and memory BIST can be inserted at the block level, and then driven in the finished design through hierarchical connections to each subunit. When changes are needed, only the affected blocks require modification.

So, what happens when the physical design is flat, but the design is so large that performing DFT and inserting memory BIST takes too long? This is the issue that a recent Mentor case study examines in the flow used for an ON Semiconductor design with ~10 million gates and 300 memory instances. Using a flat DFT and memory BIST methodology took 9 hours, which meant that a design iteration could cost an entire day. ON Semiconductor worked with Mentor to devise a hybrid flow that let them keep their flat physical design and take advantage of the hierarchical efficiencies of Tessent Memory BIST.

The challenge was to take advantage of the efficiency of hierarchical memory BIST on a flat design.  Overlaid on this were the usual considerations for designing and grouping memory BIST controllers. Physical proximity plays a big role in deciding which memories can share controllers. Because it is better to test memories at their native speeds, grouped memories should be in the same clock domain. Running all memory test concurrently might exceed the available power dissipation capabilities, so decisions are necessary about which tests can be run in parallel. There are also algorithm and repair issues to sort out.

The solution that Mentor and ON Semiconductor arrived at was to partition the final flat physical design into 13 submodules and adding memory BIST to them using Tessent’s hierarchical flow. The test insertion time for each submodule is about 1.5 hours. Because they can be run in parallel, the overall runtime for the full chip went from 9 hours to 1.5 hours. Scan chain insertion was still done at the top level, however, DRC verification can be done at the submodule level, saving even more time – ~25%. IJTAG (IEEE 1687) was used at the chip level and Tessent MBIST was used to generate memory BIST patterns.

ON Semiconductor was pleased with this approach because they gained many of the advantages of a hierarchical test flow but did not have to go back and redesign the physical implementation. As I have said before, I like real world examples of how specific tools are beneficial. In this case the participation of ON Semiconductor shows the practical real-world value of the Tessent hierarchical flow in an interesting hybrid application. More details of the methodology are available in the case study which can be downloaded from the Mentor website.

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Is Hong Kong a preview of Taiwan? Will HK embolden China to take Taiwan faster?

Is Hong Kong a preview of Taiwan? Will HK embolden China to take Taiwan faster?
by Robert Maire on 08-15-2019 at 6:00 am
Categories: Semiconductor Advisors, Semiconductor Services
2 Comments

On our recent Asian tour, Hong Kong was our last leg, arriving this past Friday and departing Monday, the day the airport stood still. We were on a 2:20PM flight out of Hong Kong back to the states which was one of the last flights to leave before the airport was shut down. Much like the China trade issue, the Hong Kong problem looks to be getting quickly out of hand for no good reason.

Fake news and censored news

When we arrived, Friday, there were a lot of protesters at the airport, all very peaceful, either sitting on the floor of arrivals or handing out literature stating their concerns and position regarding China’s assertion of control over Hong Kong. We easily walked through on the way to our taxi , taking some flyers along the way. It was certainly not the “rioters” or “terrorists” the Chinese government had described. In the previous week when watching CNN in our hotel in China, every time a segment about Hong Kong came on, the screen went dark & silent until the segment was over. We got uncensored news through a VPN connection to the US.

An excuse for a crackdown

It seems pretty clear that China was coming up with excuses to crack down more harshly on Hong Kong in their description of the protestors. There is now a show of force with a military convoy massing on the Shenzhen side of the Hong Kong border. We saw no protestors during our departure. The airport was shut down right after our departure. China probably wanted to have an excuse to react by complaining about economic damage caused from the airport being shuttered. The protestors went so far as to use thousands of “post-it” notes rather than permanent graffiti or anything that would cause damage at the airport.

Subsumed by the Chinese “Borg”-

The protests started over a proposed law to allow extradition of Hong Kong residents to greater China. Probably not much different than being sent to a gulag in the former Soviet Union. This was seen as the first major step in the elimination of the “one China, two systems” that has kept Hong Kong moderately free. It is clearly the first step of the final “absorption” process.

Taiwan should be scared to death

If we were watching the uncensored news coverage of Hong Kong in Taiwan we would be scared to death that we were next on the hit parade. China has made its intentions and views very, very clear about Taiwan, as it also has about the South China Sea.

The acceleration of the Hong Kong absorption and crackdown on resistance could be both a preview of Taiwan and a test of the US’s resolve to resist these moves. So far the isolationist reaction of the US administration has been more of an invitation for China to increase its pace rather than pause out of concern. If we were a Taiwanese resident, that reaction from the US government would make me twice as scared, that the US would drop Taiwan as quickly as Hong Kong and say “Taiwan was part of China anyway”…..or maybe use Taiwan as a bargaining chip in trade negotiations.

The entire chip industry is at risk

If we were in the Chinese administration and upset that our fledgling chip industry was being attacked and choked off by the imperialist US that sounds like a good enough excuse to react defensively and move up my timeframe to take back Taiwan. Yes, it might be a little higher profile than Hong Kong but what’s the US gonna do about it anyway? Whimper a little bit?

Taiwan is too large a prize to be ignored in the “made in China 2025” game plan as it becomes the ultimate “checkmate” against the US as TSMC is now the leader in chip technology and there is more than enough memory technology in Taiwan as well from Micron. It is a clear existential risk to the US and global semiconductor industry.

“When they came for me, there was no one left to help”

The near term reaction to the Hong Kong issue is much, much larger than just Hong Kong as it is another milestone larger, longer term march. The reaction to this milestone will likely have strong implications for China’s ambitions in many other areas.

While it may be hard for the US to throw stones from their own imperialist, dominant, crystal palace it does seem to be the right thing to do.

The stocks

Hong Kong ratchets up the trade war with China to an even hotter level. If the US does react to Hong Kong the Chinese could further up the ante in the trade war. If the US doesn’t react, its like an open invitation to start absorbing Taiwan sooner rather than later. Not a great choice.

This suggests that the trade issue will remain hot for the near term and continue to negatively pressure stocks, especially tech stocks and semi stocks.

There could also be some direct pressure on companies impacted by problems in Hong Kong or nearby Shenzhen that uses Hong Kong as a shipping port. Some US tech companies, such as AEIS, do a lot of their manufacturing in Shenzhen. However, we are sure that China won’t let Hong Kong impact Shenzhen for long as Shenzhen is a crown jewel in China’s tech ambition.

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US-China decoupling and the semiconductor industry – who gets hurt?

US-China decoupling and the semiconductor industry – who gets hurt?
by Bart van Hezewijk on 08-14-2019 at 10:00 am
Categories: General
13 Comments

On November 7 last year, Henry M. Paulson, Jr., Chairman of the Paulson Institute and former Secretary of the US Treasury gave a speech in Singapore about the growing tension between the United States and China and warned that “an economic iron curtain” is a very real possibility as a result of a decoupling between the United States and China. Chinese as well as foreign media have since then written about a possible US-China decoupling resulting in a variety of opinions about the matter.

“Other countries are being forced into an unwelcome choice. In a win-lose world, you are either with America or you are with China.” – Edward Luce, Washington columnist and commentator for the Financial Times; Financial Times, December 20

“It is utterly unrealistic to uncouple China and the US economically. The two economies are symbiotically connected and are too interdependent to be pried apart.” – Sourabh Gupta, senior fellow at the Washington-based Institute for China-America Studies; Xinhua, June 4

“The trade war from our side is primarily about decoupling China from the US supply chain. I get it. But these policies that Trump is pursuing also gives the rest of the world an argument to decouple from the US.” – John Scannapieco, shareholder Nashville office Baker Donelson law firm; Forbes, June 26

“Decoupling could be seen as ‘strategic blackmail’ for Washington to try to prevent China from growing stronger.” – Li Xiangyang, director National Institute of International Strategy, Chinese Academy of Social Sciences; South China Morning Post, July 7

“Beijing could work more with its Asian neighbors to prepare for a possible decoupling with the United States.” – Sun Jie, Researcher Institute of World Economics and Politics, Chinese Academy of Social Sciences; South China Morning Post, July 7

Mr. Paulson also reflected on his own speech in February this year when he addressed the Center for Strategic and International Studies (CSIS): “Technology is an integral part of business success, blurring the lines between economic competitiveness and national security. The result is that, after forty years of integration, a surprising number of political and thought leaders on both sides advocate policies that could forcibly de-integrate the two countries … We need to consider the possibility that the integration of global innovation ecosystems will collapse as a result of mutual efforts by the United States and China to exclude one another. [This] could further harm global innovation, not to mention the competitiveness of American firms around the world. But more than that, I am convinced that it has the potential to harm the United States in ways that too few people in Washington seem to take seriously: They’re focused on finding ways to hurt China and attenuate its technological progress in advanced and emerging industries. But they’re less focused than they should be on what that effort might mean for America’s own technological progress and economic competitiveness.”

The potential damage the US government’s actions in the trade war could do to global innovation ecosystems as well as American companies is particularly relevant in the semiconductor industry. The two most prominent targets of the US government’s actions have been ZTE and Huawei. After Huawei was put on the US Department of Commerce’s Entity List in May, the Chinese Ministry of Commerce announced it would publish its own list of ‘unreliable entities’. Although no such list has been published yet, American semiconductor companies such as Qualcomm and Intel, who had already cut off their supplies to Huawei, could potentially be targeted.

But even without being listed as an ‘unreliable entity’ by the Chinese government, the consequences of US government actions could hurt US semiconductor companies. A staggering 67% of Qualcomm’s revenue comes from China, for Micron this is 57%, and for Broadcom 49%. These three companies’ combined revenue from China was US$ 42.8 bn in 2018. It is no surprise that the American Semiconductor Industry Association (SIA) told the Trump administration that the sanctions against Huawei risked cutting off its members from their largest market and hurting their ability to invest. US-based Qorvo indicatedthat sales to Huawei accounted for 15% of its total annual revenue (US$ 3bn) and US company Lumentum said that Huawei accounted for 18% of their revenue in Q1 2019.

Especially in an industry where R&D is not only necessary but also very costly, losing revenue from China will hurt the technological development and competitiveness of American firms. To get an idea about the potential impact of a US-China decoupling in the semiconductor industry, I analysed semiconductor companies’ revenue shares from the US and China. Looking at the annual reports of seven of the largest semiconductor equipment companies, all but one (Dutch lithography equipment maker ASML) sell more to China than to the US (see Figure 1). The China-US ‘sales balance’ for Applied Materials shows that their revenue from China is 3.4 times as much as their revenue from the US.

For the other three American (Lam Research, KLA and Teradyne) and two Japanese (Dainippon Screen and Tokyo Electron) equipment makers, the sales balance also favours China. One possible explanation that ASML’s revenue from the US is (a little) more than their revenue from China, is that their most expensive (EUV) equipment is used for the most advanced technology nodes. It is likely that they sell these more to the leading chipmakers (such as Intel in the US) than to (less advanced) foundries in China.

For the combined revenue of these seven equipment makers (US$ 60 bn), the China part is 1.9 times as much as that from the US. Sales to China and the US represent about one third of their total sales on average, South Korea and Taiwan (and to a lesser extent Japan) being the most important other sales regions for these companies.

Figure 1: China-US sales balance semiconductor equipment

I did the same exercise for eight of the biggest semiconductor suppliers in the world (see Figure 2). For the selected companies, six from the US (Qualcomm, Micron, Broadcom, Texas Instruments, Nvidia and Intel), one from the Netherlands (NXP), and one from South Korea (SK Hynix), the numbers are even more striking. US-based Qualcomm’s China revenue is more than 25 times as much as its US revenue.

Although the other companies’ sales balance does not even get close to Qualcomm’s, another four of these companies sell more than 3 times as much to China as they do to the US. Actually, for all these eight major semiconductor suppliers their China sales is more than their US sales.

For the combined revenue of these eight semiconductor suppliers (US$ 218 bn), the China part is 2.3 times as much as that from the US. For these companies, sales to China and the US represents on average 60 percent of their total sales. Two (non-US) companies that are often mentioned in the semiconductor suppliers top 10 are not included in this analysis. South Korea’s Samsung is not included because it does not present a geographical distribution for its semiconductor business (US$ 77.2 bn) in its annual report. Taiwan-headquartered TSMC is left out as it is the only pure play foundry among these companies.

Figure 2: China-US sales balance semiconductor suppliers

It is no surprise that for all global leaders in the semiconductor industry both China and the US are extremely important markets. What becomes clear here though, is that for 14 out of 15 of the largest semiconductor companies in the world, including all 10 American companies, their sales in China is (sometimes much) more than their sales in the US.

For the 10 American semiconductor companies included in this analysis, their combined revenue from China (US$ 79.3 bn) is 2.8 times as much as their combined revenue from the US (US$ 28.1 bn).

The Chinese government has made no secret of its ambitions to further develop the domestic semiconductor industry. For instance, by establishing the China Integrated Circuit Industry Investment Fund (CICIIF or ‘Big Fund’) in 2014 and setting ambitious targets for the semiconductor industry in the “Made in China 2025” plan. With setting up the Big Fund, the Chinese government envisioned spending more than US$ 160 bn over 10 years to stimulate developments in semiconductor design and manufacturing and one objective of Made in China 2025 is to increase China’s self-sufficiency in chip production to 40% in 2020 and 70% by 2025. Ding Wenwu, President of the Big Fund, already acknowledged 1.5 years ago that this catching up will not be an easy task: “How can one overtake the front-runners when lagging so far behind? Not to mention the leaders are trying very hard to keep their position.”

Looking at the 2018 data, the only conclusion can be that there is still a long way to go for China to reach the desired levels of domestic chip production. IC insights calculated that total chip production in China by Chinese headquartered companies accounted for only 4.2% of the domestic demand in 2018.

Adding the production by foreign companies in China, this number rises to 15.5%. More than 70% of the chips made in China are made in foreign companies’ fabs. Being the largest consumer of chips, China is still very much dependent on importing them. Even with chip production of foreign companies in China included, it will be very challenging to achieve the ambitious goals of self-sufficiency.

In the semiconductor industry’s globally integrated network, policies aimed at decoupling will not help anyone. China needs fabs of foreign (including US) companies to reach its targets of ‘domestic’ production. The semiconductor equipment leaders are American, Japanese and Dutch companies, and increasing production without equipment from these countries seems impossible. On the other hand, these companies also need their revenue from China to be able to invest in R&D and keep innovating. This is even more true for the largest semiconductor suppliers in the world such as Intel, Micron, Qualcomm, Broadcom and Texas Instruments. SIA mentioned in their April 2019 report Winning the Future – A Blueprint for Sustained US Leadership in Semiconductor Technology: “The US semiconductor industry already invests heavily in its own research and development to stay competitive and maintain its technology leadership. Nearly one-fifth of US semiconductor industry revenue is invested in R&D.”

Many (most) of the largest semiconductors suppliers in the world are American companies, but any policy that diminishes their China revenue will definitely hurt their competitiveness. According to the SIA report, “Semiconductors are America’s fourth-largest export, contributing positively to America’s trade balance for the past 20 years. More than 80 percent of revenues of US semiconductor companies are from sales overseas. Revenue from global sales sustains the 1.25 million semiconductor-supported jobs in the US, and is vital to supporting the high level of research and development necessary to remain competitive.”

Banning US companies from doing business with Chinese semiconductor companies will indeed delay the development of the semiconductor industry in China. But that’s just one side of the story. It will also hurt American (and other) companies’ competitiveness, as Mr. Paulson argued in his speech about a US-China decoupling and the possibility of an ‘economic iron curtain’. I hope this article gave some quantitative insights on how much the US and China, and all countries in the global semiconductor value chain, are dependent on each other to keep achieving technological progress. So please allow me to end with a quote by Ken Wilcox, Chairman Emeritus of Silicon Valley Bank, one of the experts interviewed in the (highly recommended) film “Trump’s Trade War” by Frontline and NPR:

“If your goal is to stop China from advancing, you’re not going to accomplish that anyway. Because they’ll just innovate around you.

Why would you want to stop anybody from making progress? … The better goal is for us to spend time on becoming more powerful ourselves.”