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It has recently been revealed that the N5 node from TSMC has a minimum gate pitch of 51 nm [1,2] with a channel length as small as 6 nm [2]. Such a tight channel length entails tight CD control in the patterning process, well under 0.5 nm. What are the possible lithography scenarios?
Blur Limitations for EUV Exposure
A state-of-the-art
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Recently TechInsights analyzed a Bitcoin Miner chip fabbed at SMIC and declared SMIC has a 7nm process. There has been some debate as to whether the SMIC process is really 7nm and what it means if it is 7nm. I wanted to discuss the case for and against the process being 7nm, and what I think it means.
First off, I want to say I am not going … Read More
-Where are we in the chip cycle? Why is it different this time?
-No one rings a bell to indicate the top or bottom of a cycle
-Could the lack of self-awareness lead to a worse downturn?
-Who will weather the cycle better & come out on top
Gravitational Cognizance
“A cartoon character will not fall until they realize they should
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Several signs point to an easing of the shortages of semiconductors for automotive applications. However, the production of light vehicles will likely remain below full potential through at least 2023. LMC Automotive’s July forecast of light vehicle production called for 81.7 million units in 2022, up 2% from 2021. LMC’s January… Read More
The media has gone wild over a false report that Intel and TSMC are slowing down 3nm. It is all about sensationalism and getting clicks no matter what damage is done to the hardworking semiconductor people, companies and industry as a whole. And like lemmings jumping off a cliff, other less reputable media outlets perpetuated this… Read More
What we alone said would surely happen, but what was widely denied by the industry, was confirmed with June’s WSTS Blue Book report. Right on cue with our December 2021 forecast, the current semiconductor Super Cycle is finally drawing to a close and the 17th market downturn has now well and truly started.
The Macro Evidence
At the… Read More
Pinpointing exactly when 450mm died is tricky. Intel’s pullback in 2014 has been cited as a pivotal moment because it was the main backer of the proposed transition, as it had been for the shift to 150mm (6-inch) wafers in the early 1980s.
However, the participation of global foundry leader TSMC was also seen as crucial if 450mm wafers… Read More
-Need more/less spend & more/fewer chips
-The irony of chips act passage & Intel stumble on same day
-Due to excess supply of chips, Intel cuts spending
-Due to shortage of chips, the government increases spending
-How did this happen on the same day? Cosmic Coincidence?
Timing is everything
The irony of intel cutting spending… Read More
At the recent VLSI Symposium on Technology and Circuits, Dr. Y.J. Mii, Senior Vice President of Research and Development at TSMC, gave a plenary talk entitled, “Semiconductor Innovations, from Device to System”. The presentation offered insights into TSMC’s future R&D initiatives, beyond the current roadmap. The associated… Read More
Throughout its history, the ASIC industry has had its ups and downs. With feast and famine cycles, the ASIC business model is not for the faint of heart. Some companies tread boldly while others dread the cycles and stay away from this business model. Those who are consistently successful have to overcome many challenges thrown … Read More