Every SoC that connects to an analog sensor or device requires AMS (Analog Mixed-Signal) circuit simulation for design and verification, so this year at #54DAC the organizers at Synopsys hosted another informative AMS panel session over lunch time on Monday. What makes this kind of panel so refreshing is that the invited speakers… Read More
Tag: synopsys
First Thoughts from #54DAC!
This was my 34[SUP]th[/SUP] DAC, yes 34. It is a shame blogging did not exist back then because I would have liked to have read thoughts from my eager young mind, or maybe not. The first thing that struck me this year is the great content. Before DAC I review the sessions I want to see and this year there were many more than I had time for. … Read More
Don’t Miss “The IP Paradox” Panel @ #54 DAC!
Despite the strong consolidation in the semiconductor industry, the Design IP market is still growing: from $3 billion in 2015 to $3.4 billion in 2016. That’s why the DAC IP Committee has organized this panel, titled “The IP Paradox: Growing Business Despite Consolidations” (you can see more on the events page: https://dac.com/events… Read More
AIM Photonics Catching Its Stride as They Move into 2nd Year
AIM Photonics held its 2017 Proposers Meetings on May 24[SUP]th[/SUP] in Rochester, NY. The meetings included a review of AIM’s progress and strategic direction by their TRB (technical review board) and a session targeted at PIC (photonic integrated circuit) design for multi-project wafer (MPW) runs. While these discussions… Read More
FD-SOI in Japan?
If you want to get your finger on the Japan FD-SOI pulse, registration is still open for a free, two-day workshop in Tokyo this week organized by the SOI Consortium. This is the 3rd Annual SOI Tokyo Workshop, and there’s a really interesting line-up of speakers.
In case you’re wondering, Japan is doing FD-SOI. In fact… Read More
CDC Verification for FPGA – Beyond the Basics
FPGAs have become a lot more capable and a lot more powerful, more closely resembling SoCs than the glue-logic we once considered them to be. Look at any big FPGA – a Xilinx Zynq, an Intel/Altera Arria or a Microsemi SmartFusion; these devices are full-blown SoCs, functionally different from an ASIC SoC only in that some of the device… Read More
Building Better Digital Content Protection
Back in college my roommates figured out that the TV cable coax wire was still connected to our apartment. As a result, I was able to watch the Richard Pryor movie Silver Streak about 30 times without a cable box, however the screen was partially jumbled from the simple content protection used back then. This was possible by aggressively… Read More
Webinar: Next Generation Design Data & Release Management
Design Data Management (DDM) is a bit like insurance. It’s something every semiconductor company has to have, and as a result it’s probably something taken for granted. In order to make their products more useful, the DDM vendors have added more functionality to manage more of the lifecycle of design data.
Dassault’s Synchronicity… Read More
EDA CEO Outlook 2017
A long standing tradition has returned to EDA: The CEO Outlook sponsored by ESDA (formerly EDAC) which alone is worth the price of membership! Not only do you get a free meal, the event included quality networking time with the semiconductor elite. In the past, financial analysts moderated this event holding the CEO’s feet to the… Read More
IP Vendors: Call for Contribution to the Design IP Report!
The EDA & IP industry enjoys high growth for the Design IP segment, but a detailed analysis tool is missing. IPnest will address this need in 2017, expecting the IP vendors’ contribution! If we consider the results posted last March by the ESD Alliance, the EDA (and IP) industry is doing extremely well, as the global revenue has… Read More