Apple Watch – A Great New Design, Needs More

Apple Watch – A Great New Design, Needs More
by Pawan Fangaria on 07-06-2015 at 7:00 pm

During 52[SUP]nd[/SUP] DAC, there was a special session where a brand new Apple watch was opened and each of its components was shown with a brief description about it. I found this tear down session a great innovative idea coming from DAC organizers; actually two buzzing products, AppleWatch and DJI’s Phantom Drone were opened… Read More


Intel 10nm delay confirmed by Tick Tock arrhythmia leak-"The Missing Tick"

Intel 10nm delay confirmed by Tick Tock arrhythmia leak-"The Missing Tick"
by Robert Maire on 07-06-2015 at 7:00 am

Our 6/15 report of more 10nm Intel delays confirmed by leaked info…
The delay appears to have interrupted Intel’s Tick Tock cadence…
Kabylake replaces Skylake – Cannonlake pushed out over horizon?

The news we broke is now confirmed…
On 6/15 we put out a report that broke the news of further delays… Read More


Cellphones on the Path of Extinction

Cellphones on the Path of Extinction
by Pawan Fangaria on 07-05-2015 at 4:00 am

Semiconductor based electronics has continuously improved lives of people through various kinds of technology upgrades in the gadgets for our daily use. Imagine the journey from a mechanical typewriter to a laptop computer connected through a laser printer, transition from black & white photography to exotic coloured… Read More


GlobalFoundries Endorse ST/LETI FD-SOI 22nm!

GlobalFoundries Endorse ST/LETI FD-SOI 22nm!
by Eric Esteve on 07-03-2015 at 9:00 am

The LETI days and the associated FD-SOI workshop took place in Grenoble (France) last week and I could not attend in person… but I had the opportunity to speak with LETI CEO Marie Semaria. Before going into details into the 3 key messages from the LETI (FD-SOI, Silicon Impulse and Cool Cube), it’s important to share the great news from… Read More


Synopsys Vision on Custom Automation with FinFET

Synopsys Vision on Custom Automation with FinFET
by Pawan Fangaria on 06-26-2015 at 7:00 am

In an overwhelmingly digital world, there is a constant cry about the analog design process being slow, not automated, going at its own pace in the same old fashion, and so on. And, the analog world is not happy with the way it’s getting dragged into imperfect automation so it can be more like the digital world. True, the analog world… Read More


Samsung: the Journey to 14nm and 10nm

Samsung: the Journey to 14nm and 10nm
by Paul McLellan on 06-24-2015 at 7:00 pm

At the Samsung theatre (cutely named the Samsung Open Collaboration (SoC) theater) I watched a presentation by KK Lin on using DFM to bring up their 14nm and 10nm processes. And yes, they are real. Here is a picture I took of a 14nm wafer and a 10nm wafer. Samsung announced that they would ramp 10n to volume production by the end of next… Read More


A Closer Look at Fab Closures Around the World

A Closer Look at Fab Closures Around the World
by Pawan Fangaria on 06-24-2015 at 12:00 pm

Electronics is unusually an evergreen industry where companies make profit, yet end-product prices go down significantly after a brief period of price skimming. A product phases out quite fast (in case of smartphones every 1.5 to 2 years), but still yields big bucks for successful companies in its value-chain. How does this happen?… Read More


eSilicon@Samsung: ASIC Design, IP Enablement, and Cloud Platform

eSilicon@Samsung: ASIC Design, IP Enablement, and Cloud Platform
by Paul McLellan on 06-12-2015 at 7:00 am

Earlier this week at DAC, Javier DeLaCruz of eSilicon presented at the Samsung booth. They presented an introduction to what eSilicon does. However, since what they do has changed over the years it is useful to recap. If you know about eSilicon then you probably think of them as a fabless ASIC company. The old ASIC model back in the … Read More


NVIDIA and Qualcomm Talk about High Level Synthesis, Samsung on Low Power for Mobile

NVIDIA and Qualcomm Talk about High Level Synthesis, Samsung on Low Power for Mobile
by Daniel Payne on 05-31-2015 at 4:00 pm

Since 1978 I’ve seen many trends in the semiconductor design world: transistor-level IC design, gate-level design, RTL coding, High Level Synthesis (HLS) and IP re-use. We’ve witnessed the growth in design productivity enabling chips starting with just thousands of transistor all the way up to billions of transistors… Read More