Global semiconductor production capacity and its utilization level are key elements of the technology economy. During a panel at DAC in June Mentor Graphics posited that we are entering into a period where leading edge processes will be in high demand and also older nodes are seeing increasing demand due to Internet of Things designs that are relying on low power and low cost silicon. All this could put a squeeze on wafer availability.
Without enough wafer fabrication capacity available, electronic product manufacturers who rely on semiconductor components will fall short on their own revenue targets. On the other hand, foundries need to carefully maximize their utilization to ensure adequate margins and profitability. Semiconductor fabs are notoriously expensive to build and their construction comes with extremely long lead times.
It’s interesting to look at hard data on utilization, but unfortunately the SIA stopped issuing their reports on wafer fab capacity and utilization in October 2012. Nevertheless, looking at their last report which covers up to 2011 a number of interesting things can be observed.
Prior to the 2008 downturn, utilization percentages were hovering in the high 80’s, occasionally reaching a peak of around 90%. During the 2008-2009 recession, they fell as low as 56%. But then quickly recovered. From 2010 to the end of the report period utilization exceeded 90%.
So what happens as capacity reaches its limits? The obvious answer is that it can lead to allocation, and all the unpleasantness that come with that. Of course certain processes will be in greater relative demand than others, leading to bottlenecks on particular nodes. Also, process portability affects how elastic the market will be if customers are able move to second sources.
It turns out that there are things that foundries and even their customers can do to help avoid these problems. Similarly, foundries and their customers, by working together, can also help avoid overcapacity which can be equally problematic. The key to this is accurate forecasting on the part of foundry customers.
At DAC 2015 Mentor hosted a panel discussion on this topic. The panelists were Prasad Subramaniam – Vice President of Design Technology and R&D from eSilicon, Kelvin Low – Senior Director of Foundry Marketing with Samsung and UMC USA Vice President of Business Development Walter Ng. The discussion was moderated by Michael Buehler-Garcia – Senior Director Calibre Design Solutions at Mentor.
Walter Ng made the point that foundries really see allocation causing lost opportunity; in his words “it’s not fun for the foundry.” He added that it is essential that customers work with the foundry to ensure forecasts are accurate. In reality several customers might be competing for the same socket and only one will win, causing the other competing prospective orders to not materialize. This means that customers need to make a strong business case for their product to get access to valuable wafers during a period of allocation.
Samsung’s Kelvin made the point that silicon is not the only issue. Design for manufacturing affects yield and consequently the actual number of chips that can be marketed. Higher yield means fewer wafers are needed for a given number of finished chips. Another real limitation is tester time. Improved test vectors will speed production. All of the panelists agreed that customers play a significant role in enabling foundry capacity.
Kelvin also wants to see more data to back up the forecast numbers that are now being used for IoT chips. My own thought is that a lot of these chips might be on older nodes. This of course comes with a mixed blessing. It’s nice to have demand for older nodes, but if the demand is growing as new products are designed for older nodes, how do foundries fill this demand? Nobody is going make more 8” fabs. Walter Ng asked if it might make sense to actually build 12” fabs at older nodes.
Another consequence of significant new designs on older nodes are the questions raised about retrofitting the older flows for these nodes to add critical features like updated power management strategies. Not just the flow, but existing IP might need to be updated on these popular older nodes.
It seems that all the foundries are moving aggressively to increase supply. Kelvin cited Samsung’s outlay of $15B to build their new fab.
Likewise, Walter said that UMC is banking on increased demand for 28nm, and are investing in increasing their capacity.
Even in the distracting environment at DAC this panel drew quite a crowd, overflowing from the seating area of their booth out into the aisle. This alone indicates the level of interest in the topic of foundry capacity. Mentor did a good job of pulling this panel together, even though it could be argued that this topic is out of their wheel house. Of course only time will tell if the growing markets like IoT actually lead to capacity shortfalls for leading or training nodes. For further reading on why and how the IoT is putting higher demand on older process nodes I suggest this article.