The list of possible stochastic patterning issues for EUV lithography keeps growing longer: CD variation, edge roughness, placement error, defects [1]. The origins of stochastic behavior are now well-known. For a given EUV photon flux into the resist, a limited fraction are absorbed. Since the absorption is less than 5% affected… Read More
Tag: euv
Chip Enabler and Bottleneck ASML
-ASML reported an “in line” Q1- Orders remain super strong
-Ongoing supply chain issues will limit growth and upside
-ASML targets 2025 for supply fixes- We are not so sure
-Intel, TSMC, Samsung won’t be able to build all fabs they plan
ASML has “In linesh” Q1, orders still off the charts
ASML reported… Read More
Intel and the EUV Shortage
In my “The EUV Divide and Intel Foundry Services” article available here, I discussed the looming EUV shortage. Two days ago, Intel announced their first EUV tool installed at their new Fab 34 in Ireland is a tool they moved from Oregon. This is another indication of the scarcity of EUV tools.
I have been tracking EUV system production… Read More
EUV Resist Absorption Impact on Stochastic Defects
Stochastic defects continue to draw attention in the area of EUV lithography. It is now widely recognized that stochastic issues not only come from photon shot noise due to low (absorbed) EUV photon density, but also the resist material and process factors [1-4].
It stands to reason that resist absorption of EUV light, which is … Read More
DUV, EUV now PUV Next gen Litho and Materials Shortages worsen supply chain
-New PUV light source will push litho into Angstrom Era
-Rare earth elements shortages add to supply chain woes
-Could strategic wafer reserve releases lower memory pricing
-Can we cut off/turn off Russian access to chip equipment?
DUV, EUV and now “PUV” to become next generation lithography
Lithography is the locomotive… Read More
The EUV Divide and Intel Foundry Services
The EUV Divide
I was recently updating an analysis I did last year that looked at EUV system supply and demand, while doing this I started thinking about Intel and their Fab portfolio.
If you look at Intel’s history as a microprocessor manufacturer, they are typically ramping up their newest process node (n), in volume production… Read More
CEO Interview: Aki Fujimura of D2S
Curvilinear Design Primer for Design, Packaging Communities
This interview was done by Bob Smith, Executive Director, ESD Alliance, a SEMI Technology Community.
Previously, Fujimura served as CTO at Cadence Design Systems and returned to Cadence for the second time through the acquisition of Simplex Solutions where he was… Read More
Horizontal, Vertical, and Slanted Line Shadowing Across Slit in Low-NA and High-NA EUV Lithography Systems
EUV lithography systems continue to be the source of much hope for continuing the pace of increasing device density on wafers per Moore’s Law. Recently, although EUV systems were originally supposed to help the industry avoid much multipatterning, it has not turned out to be the case [1,2]. The main surprise has been the
Revisiting EUV Lithography: Post-Blur Stochastic Distributions
In previous articles, I had looked at EUV stochastic behavior [1-2], primarily in terms of the low photon density resulting in shot noise, described by the Poisson distribution [3]. The role of blur to help combat the randomness of EUV photon absorption and secondary electron generation and migration was also recently considered… Read More
KLAC- Foundry/Logic Drives Outperformance- No Supply Chain Woes- Nice Beat
KLA- great quarter driven by continued strong foundry/logic
No supply chain hiccups- Riding high in the cycle
Wafer inspection remains driver with rest along for the ride
Financials remain best in industry
A superb quarter
There was little to complain about in the quarter. Revenues of $2.1B and EPS of $4.64, both nicely beating… Read More