Tag: ecosystem

TSMC 2026 North America OIP Ecosystem Forum

TSMC 2026 North America OIP Ecosystem Forum
by Admin on 08-24-2026 at 12:04 am

Join Us to Connect, Collaborate, and Shape the Future of AI

Get ready to immerse yourself in the future of semiconductor design at the 2026 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn’t just an event—it’s the ultimate collaborative hub where the world’s leading technology pioneers gather to discuss… Read More

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Silicon Catalyst Announces a New Startup Ecosystem for MEMS Led by Industry Veteran Paul Pickering and supported by STMicroelectronics

Silicon Catalyst Announces a New Startup Ecosystem for MEMS Led by Industry Veteran Paul Pickering and supported by STMicroelectronics
by Mike Gianfagna on 06-12-2020 at 10:00 am
Categories: Semiconductor Services, Silicon Catalyst
2 Comments

Screen Shot 2020 06 12 at 8.46.22 AM

A little over a month ago, I wrote about the substantial support that Silicon Catalyst and Arm were providing for chip startups. There have been many incubators for technology companies over the years. These organizations typically provide office space, some basic infrastructure, advisory help and sometimes access to seed … Read More

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Machine Learning for EDA – Inside, Outside and Everywhere Else

Machine Learning for EDA – Inside, Outside and Everywhere Else
by Mike Gianfagna on 03-18-2020 at 6:00 am
Categories: AI, Cadence, EDA

Paul Cunningham

Artificial intelligence (AI) is everywhere. The rise of the machines is upon us in case you haven’t noticed. Machine learning (ML) and its associated inference abilities promise to revolutionize everything from driving your car to making breakfast. We hear a lot about the macro, end-product impact of this technology, but there… Read More

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An AI Accelerator Ecosystem For High-Level Synthesis

An AI Accelerator Ecosystem For High-Level Synthesis
by Bernard Murphy on 07-01-2019 at 10:00 am
Categories: AI, EDA, FPGA, Siemens EDA
1 Comment

AI accelerators as engines for object or speech recognition (among many possibilities), are becoming increasingly popular for inference in mobile and power-constrained applications. Today much of this inferencing runs largely in software on CPUs or GPUs thanks to the sheer size of the smartphone market, but that will shift… Read More

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10 Predictions for the Future of IoT

10 Predictions for the Future of IoT
by Ahmed Banafa on 04-24-2016 at 7:00 am
Categories: IoT, Security

A Google search for “Internet of Things” term reveals over 280,000,000 results, thanks to the media making the connection between the smart home, wearable devices, and the connected automobile, IoT has begun to become part of the popular parlance. But that’s not the complete picture, according to Gartner’s… Read More

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For high-volume manufacturing at 10 nm and below: technology and friendship

For high-volume manufacturing at 10 nm and below: technology and friendship
by Beth Martin on 09-03-2015 at 4:00 pm
Categories: EDA, Siemens EDA

The technology for 10 nm is settled, but what about 7 nm and 5 nm? Those nodes will happen with silicon-based CMOS and 193nm immersion lithography, but exactly how is still being worked out. Right now, though, the focus is on getting 10 nm chips into high-volume production. TSMC and Intel both claim to be on track for high-volume manufacturing… Read More

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GlobalFoundries 22nm FD-SOI: What Happens When

GlobalFoundries 22nm FD-SOI: What Happens When
by Paul McLellan on 07-17-2015 at 7:00 am
Categories: FD-SOI, GlobalFoundries, Semiconductor

Earlier in the week I wrote about GlobalFoundries announcement of 22nm FD-SOI. At SEMICON West there were three events that filled in some more details. First, on Tuesday, a lunch presentation given by SOITEC who make the wafer blanks that FD-SOI requires. Then on Wednesday I sat down for an hour with Gary Patton and Subi Kengeri … Read More

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TSMC Open Innovation Platform Forum, October 1st

TSMC Open Innovation Platform Forum, October 1st
by Paul McLellan on 09-28-2013 at 5:00 am
Categories: EDA, IP, Semiconductor, TSMC

One of TSMC’s two big Silicon Valley events each year is the Open Innovation Platform (OIP) Forum. This year it is on Tuesday October 1st. It is in the San Jose Convention Center and starts at 9am (registration opens at 8am). Pre-registration to attend is now open here or click on the image to the right.

From 9.10 to 9.40 is the … Read More

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Notes from Common Platform: Collaborate or Die

Notes from Common Platform: Collaborate or Die
by Beth Martin on 02-07-2013 at 2:16 pm
Categories: EDA, GlobalFoundries, Semiconductor, Siemens EDA

FinFETs are hot, carbon nanotubes are cool, and collaboration is the key to continued semiconductor scaling. These were the main messages at the 2013 Common Platform Technology Forum in Santa Clara.

The collaboration message ran through most presenations, like the afternoon talk by Subi Kengeri of GLOBALFOUNDRIES and Joe Sawicki… Read More

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What did CES 2013 mean for #SemiEDA?

What did CES 2013 mean for #SemiEDA?
by Don Dingee on 01-18-2013 at 4:55 pm
Categories: Cadence, EDA

CES is the preeminent gadget show, and in the LVCC South Hall a wave has been building for some time. It’s now the place where chipsets are introduced, and this year saw a wide range of introductions from Atmel, Bosch, Broadcom, Intel (OK, they’re still in Central Hall), InvenSense, Marvell, NVIDIA, Qualcomm, Samsung, ST-Ericsson,… Read More