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So what was the overall theme of DAC this year? Usually there seems to be some trend that is hot. A few years ago it was power, then more recently all the stuff associated with 20nm and 16nm such as FinFETs and double patterning. Those things are still around, of course, and there are new generations of tools.
One theme is that more design… Read More
Tuesday morning at DAC I enjoyed a free breakfast courtesy of Synopsysand GLOBALFOUNDRIESwhere I learned more about the emerging market of IoT, and what it means to semiconductor, EDA and IP vendors. Panelists included: Semico Research, HP, Synopsys, GLOBALFOUNDRIES and Broadcom. … Read More
When I hear the phrase “high sigma” I think of the EDA vendor Solido, however at DAC on Monday I visited another EDA company called MunEDAthat has several products of interest to transistor-level IC designers. I was able to speak with three different people from MunEDA and here’s what I learned.… Read More
First thing at DACtoday I met with Greg Lebsack of Tanner EDA to ask about what’s new in the past year for his EDA company. Here are my meeting notes, so there’s not much prose for my DAC blogs this year.
… Read More
You are going to DAC next week. And you don’t want to eat a Moscone Center rubber chicken Caesar salad for lunch. But you lack local knowledge. So here are some places within a 10 minute walk (these are just places I like. Nobody is paying me to recommend them).
The food court in the San Francisco Center on Market Street between … Read More
DAC is Next Week!by Paul McLellan on 05-31-2014 at 3:03 amCategories: Events
DAC starts on Sunday. If you are in San Francisco on Sunday then the first event is the normal welcome reception. This is the ultimate networking event in EDA. It is in the Intercontinental Hotel about a block from the convention center and runs from 5.30 to 7pm. This is preceded by Gary Smith’s traditional kickoff from 5pm to… Read More
Since a few years, I have been following up Ansys Apachetools for semiconductor design, verification and sign-off. RedHawk is the most prominent platform of tools from Ansys, specifically for Power, Noise and Reliability Sign-off. It has witnessed many open endorsements from several of Ansyscustomers through open presentations,… Read More
Gary Smith published a list of what to see at DAC, and I noticed that he listed DOCEA Power in a category of ESL Thermal. I’ll be meeting the DOCEA engineers on Wednesday at DAC to learn more about their two newest ESL products:
- Thermal Profiler
- Power Intelligence
In general DOCEA Power tools allow you to manage power and thermal… Read More
One of the things that eSilicon does is handle all the backend operations for the designs that they do. eSilicon is a fabless ASIC company and so the most visible part of the business is the design (not to mention IP which is a critical input into design these days). But another key part is arranging with foundries like TSMC to get the … Read More
In a complex environment of semiconductor design where an SoC can have several millions of gates and multiple number of IPs at different levels of abstractions from different sources integrated together, it becomes really difficult to understand and debug the overall SoC design. Of course, along with the SoC integration, optimization… Read More