Save closure time and boost performance by incorporating knowledge of physically aware design early into your front-end design implementation flow
With the adoption of advanced process nodes, design closure is becoming increasingly difficult due to the lack of convergence between the front end and the back end of the register-transfer… Read More
Yesterday Cadence had an all-day Signoff Summit where they talked about the tools that they have for signoff in advanced nodes. Well, of course, those tools work just fine in non-advanced nodes too, but at 20nm and 16nm there are FinFETs, double patterning, timing impacts from dummy metal fill, a gazillion corners to be analyzed… Read More
How to best forecast a specific protocol adoption? One option is to look at the various IP sales, it will give you a good idea of the number of SoC or IC offering this feature on the market in the next 12 months. Once again, if you wait for the IP sale to have reached a maximum, it will be too late, so you have to monitor the IP sales dynamic when… Read More
In EDA we have come to expect that only small start-up companies create new tools, however a team at Cadencehas developed a new IC power integrity tool called Voltus from scratch. To learn more I spoke last week with KT Moore, a Group Director at Cadence. I’ve known KT for over a decade, and first met him when he was at Magma marketing… Read More
Milandr is a company based in Moscow that makes high reliability semiconductor components for the aerospace, automotive and consumer markets, primarily in Russia. They work with multiple foundries, including X-FAB and TSMC in technologies from 1um down to 65nm. Corporate headquarter and main IC design house is located in Russian… Read More
I was the VP marketing at VaST Systems Technology and then at Virtutech. Both companies sold virtual platform technology which consisted of two parts:
I am at ARM TechCon today. One interesting presentation was made jointly between Samsung, Cadence and ARM themselves about developing physical libraries (ARM), a tool flow (Cadence) and test chips (Samsung). It was titled Samsung ARM and Cadence collaborate on the silicon-proven world first 14-nm FinFET Cortex-A7 ARM CPU and… Read More
In the modern electronic world, it’s difficult to imagine any system working as a whole without MEMS (Micro-electromechanical Systems) such as pressure sensors, accelerometers, gyroscopes, microphones etc. working in sync with other ICs. Specifically in AMS (Analog Mixed-Signal) semiconductor designs, there can be significant… Read More
On October 10, I attended another Cadence Summit, this one titled the Cadence Mixed-Signal Technology Summit. Recently, I had written about the Cadence Silicon Verification Summit. The verification event was the first of its kind, and I thought it had terrific content. Being more of a digital guy myself, I was unaware that Cadence… Read More
I have been at the Linley Microprocessor Conference today. This is the one that is not about mobile: about servers, networking, base-stations. Probably the most important story about the whole industry is that the “shift to ARM becomes a stampede.”
In this market it seems to be driven by the 64-bit ARMv8 instruction… Read More
