TSMC has had an interesting year thus far. 28nm is ramped and will dominate the mobile market for years to come. 20nm is in development with tape outs scheduled for the end of this year. FinFETS are coming making it a very exciting time in the semiconductor ecosystem.
Continue reading “TSMC Update 2012!”
Clever title but it’s not mine. Piper Jaffray Analysts Auguste Richard and Jennifer Baxter released a report last week which echoed the concerns of others, including myself. The concerns reported are with the 22nm process and not the chipsets themselves. To me this is all part of ramping a leading edge process but the concerns are real and should be discussed.
Continue reading “Intel’s Tri-Gate May Have Moore Problems Than You Think!”
Yesterday’s SEMICO IP Ecosystem Conference was well worth the time. Everybody was there: ARM, Synopsys, Cadence, Mentor Graphics, GlobalFoundries, TSMC, MIPS, Tensilica, AMD, Atrenta, Sonics, and Tabula, everybody except Intel of course. What do Intel and I have in common? We don’t play well with others…
First up was Jim Feldham, President of Semico Research with some interesting industry forecast slides. Semiconductor revenue grew 1.3% in 2011 and is predicted to grow 9% in 2012, very believable, even with 28nm wafer allocation. Tablets (+46%) and Smartphones (+34%) lead the way with the SoC market reaching $85B. I agree with this assessment 100%.
Second up was Warren East, ARM CEO. I like Warren, he is a humble man (like me) and has the traditional British dry sense of humor (unlike me). Warren’s presentations pack the most content you will see from a semiconductor CEO. Since ARM owns 99.99% (exaggeration) of the mobile business their customer surveys are very relevant. Here are some interesting takeaways from Warren’s slides:
Warren didn’t mention “He who must not be named” (Intel) but clearly this is a clean shot at them:
Taking a “systems” view:
Bottom line: It’s all about the ecosystem. Linaro is one example as I blogged in Intel Versus ARM (Linaro).
The SoC Design community is dedicated to design engineers developing highly integrated system-on-chip solutions with ARM technology. This site addresses every phase of SoC design, from architecture selection through front end design and back end implementation and manufacturing. Learn more about best practices for designing advanced SoCs based on ARM Cortex processors, Artisan physical IP, CoreLink system IP and ARM Connected Community IP, tools and services.
ARM has a landing page on SemiWiki now which you can find HERE, ARM related blogs are organized there. The theme you will notice is ecosystem and SoC. SemiWiki blogger Don Dingee has a series of blogs on Smart Mobile SoCs including NVIDIA, Apple, Samsung, TI, and Qualcomm. He even did one on Intel: Smart Mobile SoCs: Intel. Don will go to China for the next one so stay tuned!
While I was marlin fishing in Hawaii last week I missed some interesting comments from TSMC executives at the Technology Symposium in Taiwan, a much different show than the one here in San Jose I’m told. It is good to see TSMC setting the record straight and taking a little credit for what they have accomplished! I’m sorry I missed it but I know quite a few people who didn’t and they were quite impressed.
Y.P. Chin, TSMC Vice President for operations and product development (Y.P. joined TSMC when it was founded in 1987):
Citing data from SEMI, TSMC’s capacity for logic chips was 1.5 times greater than Intel and 2 times greater than Samsung in 2011.
Interesting perspective. If you look inside your smartphone or tablet you will see both logic (brains) and DRAM (memory) chips. TSMC does the brains, Samsung does mostly memory, Intel does the big fat brain in your PC and laptop (my wife edits my blogs so this is for her).
Jason Chen, TSMC’s Senior Vice President of Worldwide Sales and Marketing (Prior to joining TSMC in 2005, Jason worked at Intel for 14+ years):
Smartphones have beat PCs in shipments since 2010. In 2012, shipments of smartphones will beat PCs by 50%. Tablets join smartphones to make mobile computing an even bigger market. Smartphones have emerged as the primary tools for internet access with even more features fit inside in the future. Online payment for example will become a standard smartphone feature.
I never thought I would give up my laptop but my iPhone 4s and iPad2 see much more action than I would have ever imagined. My wife and kids (ages 16, 18, 22, and 24) will tell you the same, absolutely. I even used my iPhone projected boarding pass to get to and from Hawaii avoiding check-in lines, very cool!
That is why TSMC is leading off 20nm with a process optimized for mobile and Intel will need to optimize their 22nm process for mobile before mainstream customers take their foundry claims seriously.
That is also why TSMC is increasing CAPEX and R&D spending to record rates this year, to capture as much mobile demand as possible. One thing you have to remember about the foundry business is that wafer price is everything, especially to the mobile market. Today TSMC is the only foundry shipping production 28nm silicon which means they have a big lead on the manufacturing yield/cost curve. Even when second source 28nm silicon hits the market it will be at a higher cost/lower margin. TSMC will also be the first with 20nm silicon (my opinion) so lather, rinse, repeat…
A question I have is: How much longer will TSMC stock (TSM) continue to trade for under $16? Anyone? Given the success of 28nm, I think you will be able to measure that in months versus years (my opinion).
Disclaimer: I do not partake in the financial markets so do not buy this or any other stock based on my comments. Seriously, you would be better off consulting your neighbor’s pet.
If you look real close at the #49 DAC floor plan you will see the tiny Intel booth dwarfed by those of TSMC, GlobalFoundries, Samsung, and ARM. The number one semiconductor company in the world does not have the budget for the cornerstone conference of the semiconductor ecosystem? Oh my…… Intel has a big foundry hat and no cattle this year.
Now in its 49th year (this will be my 29[SUP]th[/SUP]), the Design Automation Conference features a wide array of technical presentations, tutorials, and workshops, as well as more than 200 of the leading semiconductor ecosystem partners in a colorful, well-attended trade show that attracts thousands of semiconductor professionals from around the world.
This year, industry luminaries from ARM, Inc., IBM Corp., Intel Corp. and the National Tsing Hua University will give the three keynote addresses. DAC 2012 will be held at my absolute favorite venue, other than Las Vegas, the Moscone Center in San Francisco, California, from June 3-7, 2012.
“In assembling the 49th DAC series of distinguished keynotes speakers, I am excited to announce that DAC is covering all bases, providing refreshing viewpoints for systems designers, IC designers and EDA software professionals,” said Patrick Groeneveld, General Chair of the 49th DAC.
“Tuesday kicks off with ARM’s Mike Muller, who will share his vision for a future of embedded computing systems. Given that ARM’s processors power most smartphones, this will show the way for computing in the future.”
“On Wednesday, Joshua Friedrich and Brad Heaney will outline the design practices for high-performance microprocessors. This unique dual-keynote provides a look in the kitchen of leading microprocessor companies designing the world’s most advanced chips,” Patrick enthusiastically continued.
“Finally, the Thursday keynote by Kaufman Award winner Dave Liu addresses the algorithmic revolution behind EDA. Prof. Liu’s contributions and insights have enabled the remarkable design automation revolution that actually powers today’s trillion-transistor devices.”
Keynote Schedule:
All keynotes will be held in rooms 102/103.
Tuesday, June 5, 2012 from 8:30am to 9:30am
Scaling for 2020 solutions
Mike Muller, CTO, ARM Inc., Cambridge, U.K.
Comparing the original ARM design of 1985 to those of today’s latest microprocessors, Mike will look at how far design has come and what EDA has contributed to enabling these advances in systems, hardware, operating systems, and applications as well as how business models have evolved over 25 years. He will then speculate on the needs for scaling designs into solutions for 2020 from tiny embedded sensors through to cloud-based servers that together enable the “Internet of things.” Mike will look at the major challenges that need to be addressed to design and manufacture these systems and propose some solutions.
Wednesday, June 6, 2012 from 10:45am to 11:45am
Designing High Performance Systems-on-Chip
Joshua Friedrich, Senior Technical Staff Member and Senior Manager of POWERTM Technology Development in IBM’s Server and Technology Group. Brad Heaney, Intel Architecture Group Project Manager, Intel Corp., Folsom, CA.
Experience state-of-the art design through the eyes of these two experts. Joshua Friedrich will talk about POWER processor design and methodology directions and Brad Heaney will discuss designing the latest Intel architecture multi-CPU and GPU. In this unique dual-keynote, the speakers will cover key challenges, engineering decisions and design methodologies to achieve top performance and turn-around time. The presentations describe where EDA meets practice under the most advanced nodes.
Thursday, June 7, 2012 from 11:00am to 12:00pm
My First Design Automation Conference – 1982
C. L. (Dave) Liu of Tsing Hua University and also the recipient of the 2012 Phil Kaufman award.
Dave tells us: “It was June 1982 that I had my first technical paper in the EDA area presented at the 19th Design Automation Conference. It was exactly 20 years after I completed my doctoral study and exactly 30 years ago from today. I would like to share with the audience how my prior educational experience prepared me to enter the EDA field and how my EDA experience prepared me for the other aspects of my professional life.”
I hope to see you all there!
Now that the 28nm challenges are dead
It is time to look ahead
The tabloid pundits may not agree
But Moore’s law again you will see
The semiconductor ecosystem is humming
(2X gate density -20%+ performance-20%+ power savings)
The 20nm design starts are coming!
Okay, I’m really bad at poetry. Gambling however, I do pretty well. Las Vegas is my favorite destination, a mere 6 hour Porsche drive from Danville. It’s not just the math of gambling that’s intriguing, it’s also how you read a person, a play, or situation. I literally won all of my bets on 28nm and 20nm looks like another great gambling opportunity. I have two more kids to get through college so put your money where your mouth is.
Here is why the 20nm challenges will be vanquished in record time: GREED, simple as that! As I mentioned before, the semiconductor ecosystem consists of a very large crowd of very smart people with very big egos who really like making money (me for example). Whomever solves the 20nm design and manufacturing puzzles first not only gets fame, they also get fortune. Talk about motivation. And who doesn’t like solving puzzles?
20nm blogs-white papers-webinars are in play
20nm test chips arriving every day
40nm we learned how to yield
28nm we yearned for capacity
20nm will be an even bigger payday!
Better? Intel has done us all a really big favor. They are shooting their mouth off, motivating the masses, because who in their right mind would NOT want to prove Intel wrong? Especially if you can make money while doing it. Sign me up!
Here is the biggest bet: What will the TSMC 20nm ramp look like?
Remember, even though the tabloid press had 28nm “not yielding at all” and “shut down for weeks” in Q1 2012, the ramp thus far has beat expectations. The questions are:
[LIST=1]
According to the SemiWiki crowd, Apple will be at TSMC 20nm:
Who will Apple partner with at 20nm?
[LIST=1]
So you might want to factor that extra motivation into your gambling equation.
My trip this week was off a bit due to the national Taiwan holiday on Tuesday so here I sit in the EVA Executive Lounge on a sunny Saturday afternoon.
Don’t feel bad for me there’s an open bar
Don’t feel bad for me I have a beautiful car
Don’t feel bad for me this week I’m fishing afar
While the debate rages on about 28nm yield at foundry juggernaut TSMC, on Monday I attended a webinar on 20nm IC design hosted by TSMC and Synopsys. Double Patterning Technology (DPT) becomes a requirement for several layers of your 20nm IC design which then impact many of your EDA tools and methodology.
Continue reading “IC design at 20nm with TSMC and Synopsys”
There is an interesting discussion in the SemiWiki forum in response to the EETimes article: Intel exec says fabless model ‘collapsing’. Definitely an interesting debate, one worth our time since the advertising click hungry industry pundits will certainly jump all over it. Clearly I’m biased since I helped build the fabless semiconductor ecosystem. I will certainly try and be open minded here, but probably not.
Kirk Skaugen, the new general manager of Intel’s client PC group, moderated a Q&A with Mark Bohr, a 33+ year Intel alum, and Brad Heaney, the Ivy Bridge program manager. This was clearly a scripted Intel PR piece, but also an opportunity for additional hyperbole and commentary. Here are the key quotes from my point of view:
“Being an integrated device manufacturer really helps us solve the problems dealing with devices this small and complex,” Bohr said “the foundries and fabless companies won’t be able to follow where Intel is going.”
This is complete nonsense. This is not a David versus Goliath situation, this is hundreds of Davids versus Goliath. This is crowd sourcing, not unlike Twitter and Facebook where millions of people around the world collaborated and toppled ruthless dictators. This is the entire fabless semiconductor ecosystem (Synopsys, Cadence, Mentor, ARM, TSMC, UMC, GlobalFoundries, QCOM, BRCM, NVDA, AMD, and hundreds of other companies) against Intel. Hundreds of billions of dollars in total R&D versus Intel’s billions.
“Bohr claims TSMC’s recent announcement it will serve just one flavor of 20 nm process technology is an admission of failure. The Taiwan fab giant apparently cannot make at its next major node the kind of 3-D transistors needed mitigate leakage current, Bohr said.”
Not true of course. TSMC has a 20nm FinFet process coming (my opinion), Morris mentioned it in the most recent conference call:
“Now FinFET for significant performance case, we’re going to introduce FinFET after the 20-nanometer planar. We’ve been working on FinFET for more than 10 years. We’re quite confident that we will have a robust FinFET technology.” Morris Chang,Taiwan Semiconductor Manufacturing Company Ltd. (TSM) Q1 2012 Earnings Call April 26, 2012 8:00 AM ET
I honestly believe TSMC will have BOTH planar and FinFet 20nm versions. Why? Because the crowd (customers and partners) requested it. Intel will only have FinFets at 22nm. Why? Because Intel is Intel’s #1 customer and that will never change.
Intel has stated many times that they will not compete with TSMC in the open foundry market. Mark Bohr repeated it again, “Intel does not want to be in the general foundry business, but it makes its technology available to a few strategic partners.” Does everybody get that? A FEW strategic partners? TSMC is open to all customers. TSMC does not compete with customers. TSMC is customer driven. By definition, TSMC crowd sources and my bet is on the crowd every time!
Speaking of crowd sourcing, according to LinkedIn there are about 500,000 people in the semiconductor ecosystem now. Since going online in January of 2011 over 250,000 people (unique visitors) have viewed more than 2,000,000 pages on SemiWiki. Now that’s a crowd!
Either way, I do not see this as a zero sum game, both TSMC (foundry) and Intel (IDM) will thrive in the new geometries. The fabless model has brought us many new innovations and a very rich ecosystem which will be very hard to break. To much money is at stake here and Silicon Valley is full of entrepreneurs who thrive on challenge and doing the impossible. Me for example.
TSMC just finished theQ1 conference call. I will let the experts haggle over the wording of the financial analysis, but the big news is that TSMC 28nm Q1 revenue was 5%, beating my guess of 4%. So all of you who bet against TSMC 28nm it’s time to pay up! Coincidentally, I’m in Las Vegas where the term deadbeat is taken literally!
Per my blog The Truth of TSMC 28nm Yield!:
28nm Ramp:
[LIST=1]
“By technology, revenues from 28nm process technology more than doubled during the quarter and accounted for 5% of total wafer sales owing to robust demand and a fast ramp. Meanwhile, demand for 40/45nm remained solid and contributed 32% of total wafer sales, compared to 27% in 4Q11. Overall, advanced technologies (65nm and below) represented 63% of total wafer sales, up from 59% in 4Q11 and 54% in 1Q11.” TSMC Q1 2012 conference call 4/26/2012.
“Production using the cutting-edge 28 nanometer process will account for 20 percent of TSMC’s wafer revenue by the end of this year, while the 20 nanometer process is being developed to further increase speed and power” Morris Chang, TSMC Q1 2012 conference call 4/26/2012.
So tell me again that “foundry Taiwan Semiconductor Manufacturing Co. Ltd. is in trouble with its 28-nm manufacturing process technologies”Mr. Mike Bryant, CTO of Future Horizons. Tell me again that “TSMC halted 28nm for weeks” in Q1 2012 Mr. Charlie Demerjian of SemiAccurate. And special thanks to Dan Hutchenson, CEO of VLSI Research, John Cooley of DeepChip, and all of the other semiconductor industry pundits who propagated those untruths.
Lets give credit where credit is due here, I sincerely want to thank you guys for enabling the rapid success of SemiWiki.com. We could not have done it without you! But for the sake of the semiconductor ecosystem, please do a better job of checking your sources next time.
During the TSMC Symposium this month, Dr. Morris Chang, Dr. Shang-Yi Chiang, and Dr. Cliff Hou all told the audience of 1,700+ TSMC customers, TSMC partners, and TSMC employees that TSMC 28nm is: yielding properly, as planned, faster than 40nm, meeting customer expectations, etc…
Do you really think these elite semiconductor technologists would perjure their hard earned reputations in front of a crowd of people who know the truth about 28nm but are sworn to secrecy? Of course not! Anyone that implies they would, just to get clicks for their website ads, are worse than deadbeats and should be treated as such. Just my opinion of course!
TSMC also announced a 2012 CAPEX increase to between $8B and $8.5B compared to the $7.3B spent in 2011. My understanding is that the additional money will be spent on 20nm capacity and development activities (FinFets!?!?). In Las Vegas that may not qualify as “going all in” but it is certainly a very large bet on the future of the fabless semiconductor ecosystem!
For a long time Cisco had a very high end product whose official internal name during its years of development was HFR, which stood for Huge F***ing Router (the marketing department insisted it stood for ‘fast’). Eventually it got given a product number, CRS-1, but not before I’d read an article about it in the Economist under its old name. Wikipedia is on it. I was at the Globalpress briefing in Santa Cruz today and Broadcom announced their next generation network processor, definitely a chip deserving of the HFC appellation.
Unless you are a carrier equipment manufacturer such as Alcatel-Lucent, Ericsson or Huawei then the precise details of the chip aren’t all that absorbing. If you are, it’s called the BCM88030.
What I think is most interesting is the scale of the chip. It’s an amazing example of just what can be crammed onto a 28nm chip. Not just in size, but also in performance and power (or lack of it).
Firstly, this chip is a 100Gbps full-duplex network processor. This means it handles 300M packets/second, or a packet in approximately 3ns. Since its clock rate is 1GHz, that means in the time to execute 3 instructions so the only way this is workable is through parallelism. Indeed the chip contains 64 custom processors. Even that is not enough, each processor can handle up to 32 packets at a time, by advanced hardware multi-threading. Even that is not enough, some specialized functions just aren’t suited to general microprocessors and are offloaded to one of 7 specialized engines that perform functions like lookup (MAC addresses, IP addresses etc), police funtions, timing. All this while reducing power and area compared to previous generation solutions by 80%.
That’s just the digital dimension. The chip also contains the interfaces to the outside world with 24 10Gb/s Ethernet MACs, 6 50Gb/s Ethernet MACs and 2 100Gb/s Ethernet MACs.
What is driving the need for this amount of bandwidth is that carriers are switching completely to using Ethernet as their internal backbone between the different parts of their networks, from the base-station to the access network, to the aggregation network and in the core. This extremely high performance chip is targeted at aggregation and the core.
In turn this is driven by 3 main things:
These are causing an explosion in mobile backhaul, the (mostly) wired network that hooks up all the base-stations into the carriers network and to the core backbone of the internet.
The growth is quite significant. A smartphone generates 24X the data of a regular phone (I’m not sure if the includes the voice part, although in terms of bits per second that is quite low with a modern vocoder). Tablets generate 5X the data of a smartphone (and so 120X a regular phone). And the number of units is going up fast. By 2015 it is predicted that the number of connected devices will be 2X the world population. As for that video, by 2015 one million minutes of video will cross the network each second. That’s a lot of cute kittens. In total, mobile data traffic is set to increase 18 fold between 2011 and 2015.
This is driving 100G Ethernet adoption, forecast to have 170% CAGR over the next 5 years. Hence Broadcom’s development of this chip. But, like any other system of this complexity, the chip development is accompanied by an equally challenging software development problem, to develop a tool chain and a complete reference implementation so that customers can actually use the chip.
