Most of the presentations from the FD-SOI Symposium in San Jose last month (April 2016) are now available on the SOI Consortium website (click here to see the full list — if they’re posted, you can download them freely from there). If you don’t have time to wade through them all, here are some of the highlights. … Read More
Electrostatic Discharge analysis of FinFET technology
Sofics recently had the opportunity to characterize FinFET technology through cooperation with one of its customers. We analyzed the technology related to ESD and identified several challenges.… Read More
IMEC Technology Forum (ITF) – Moving the Electronics Industry Forward
IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.
Gary Patton is the Chief Technical Officer and Senior… Read More
Layout Pattern Matching for DRC, DFM, and Yield Improvement
It is truly amazing to consider the advances in microelectronic process development, using 193i photolithography. The figure below is a stark reminder of the difference between the illuminating wavelength and the final imaged geometries. This technology evolution has been enabled by continued investment in mask data generation… Read More
TSMC Update at #53DAC!
TSMC is having an interesting year for sure. I was at the TSMC Symposium in Hsinchu last week and everyone was talking about the new 16FFC process. Silicon is out and it is exceeding expectations leading some people (me included) to believe that TSMC 16FFC will be the next TSMC 28nm in regards to popularity. To be clear, 16FFC is currently… Read More
How TSMC Tackles Variation at Advanced Nodes
The design community is always hungry for high-performance, low-power, and low-cost devices. There is emergence of FinFET and FDSOI technologies at ultra-low process nodes to provide high-performance and low-power requirements at lower die-size. However, these advanced process nodes are prone to new sources of variation.… Read More
ARM tests out TSMC 10FinFET – with two cores
About 13 months ago, the leak blogs posted news of “Artemis” on an alleged ARM roadmap slide, supposedly a new 16FF ARM core positioned as the presumptive successor to the Cortex-A57. Now, we’re finding out what “Artemis” may actually be, inside a multi-core PPA test chip on TSMC 10FinFET.… Read More
IMEC Technology Forum (ITF) – IC Innovation
IMEC is a technology research center located in Belgium that is one of the premier semiconductor research centers in the world today. The IMEC Technology Forum (ITF) is a two-day event attended by approximately 1,000 people to showcase the work done by IMEC and their partners.
Luc Van Den Hove is the president and CEO of IMEC and he… Read More
TSMC Leads Again with 3-D Packaging!
Continuing to find new ways to extend Moore’s Law, the foundry and technology leader is ready to show off its wafer level system integration prowess with two scalable platforms targeting key growth markets.
CoWoS® (Chip-On-Wafer-On-Substrate) goes after high-performance applications, providing the highest bandwidth and… Read More
What Does an MPW and a Pizza Have in Common?
Design starts are critical to the growth of the semiconductor industry so enabling them is a common theme on SemiWiki. One thing we have not covered in detail is multi-project wafer services (MPW) which is the equivalent of ride sharing through the initial mask and wafer process. Larger semiconductor companies already do this … Read More


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