Banner Electrical Verification The invisible bottleneck in IC design updated 1
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Sustainable Development: Connected Devices and the Role of Flexible Semiconductors

Sustainable Development: Connected Devices and the Role of Flexible Semiconductors
by Kalar Rajendiran on 02-12-2024 at 10:00 am

Global Goals for Sustainable Development

The ambitious United Nations Sustainable Development Goals (SDGs), from reducing food waste to enhancing global healthcare access, hinge on a connected world where every object whispers valuable data. As technology strives to address environmental challenges, healthcare needs, and promote responsible consumption, traditional… Read More


SOITEC Pushes Substrate Advantages for Edge Inference

SOITEC Pushes Substrate Advantages for Edge Inference
by Bernard Murphy on 02-08-2024 at 6:00 am

FD SOI power min

You might not immediately see a connection between semiconductor substrate choices and inference at the edge. These technology layers seem worlds apart and yet SOITEC have a point. Edge AI has rapidly evolved from simple CNNs to now complex reinforcement learning systems and transformer based LLMs. Even when shrunk to edge footprints,… Read More


How Disruptive will Chiplets be for Intel and TSMC?

How Disruptive will Chiplets be for Intel and TSMC?
by Daniel Nenni on 01-15-2024 at 10:00 am

UCIe Consortium

Chiplets (die stacking) is not new. The origins are deeply rooted in the semiconductor industry and represent a modular approach to designing and manufacturing integrated circuits. The concept of chiplets has been energized as a response to the recent challenges posed by the increasing complexity of semiconductor design. … Read More


IEDM: What Comes After Silicon?

IEDM: What Comes After Silicon?
by Daniel Nenni on 01-09-2024 at 10:00 am

Screen Shot 2024 01 05 at 8.50.58 AM

The annual International Electron Devices Meeting (IEDM) took place last month. One of the presentations on the short course was by Matthew Metz of Intel titled New Materials Systems for Moore’s Law Continuation. In essence this was a look at some of the possibilities for what comes after silicon runs out of steam.

Matthew started… Read More


2024 Big Race is TSMC N2 and Intel 18A

2024 Big Race is TSMC N2 and Intel 18A
by Daniel Nenni on 01-01-2024 at 6:00 am

Intel PowerVia backside power delivery

There is a lot being said about Intel getting the lead back from TSMC with their 18A process. Like anything else in the semiconductor industry there is much more here than meets the eye, absolutely.

From the surface, TSMC has a massive ecosystem and is in the lead as far as process technologies and foundry design starts but Intel is … Read More


IEDM: TSMC Ongoing Research on a CFET Process

IEDM: TSMC Ongoing Research on a CFET Process
by Paul McLellan on 12-18-2023 at 6:00 am

Screen Shot 2023 12 16 at 12.16.14 PM

I attended the recent International Electron Devices Meeting (IEDM) last week. Many of the sessions are too technical and too far away from high volume manufacture to make good topics for a blog post. As a Fellow from IBM said about 5nm at and earlier IEDM, “none of these ideas will impact 5nm. It takes ten years for a solution to from… Read More


IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation
by Mike Gianfagna on 12-10-2023 at 2:00 pm

IEDM Buzz – Intel Previews New Vertical Transistor Scaling Innovation

For more than 65 years, the IEEE International Electron Devices Meeting (IEDM) has been the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. As I post this, the conference is underway in San Francisco… Read More


CEO Interview: David Moore of Pragmatic

CEO Interview: David Moore of Pragmatic
by Daniel Nenni on 12-01-2023 at 6:00 am

PIC BY STEWART TURKINGTON www.stphotos.co.uk

David has almost 25 years of leadership experience in the semiconductor industry. Prior to joining Pragmatic, he served as Chief Strategy Officer at Micron Technology, Inc. He also spent six years at Intel Corporation in various roles, including General Manager of the Programmable Solutions Group, where he led the multi-billion-dollar… Read More


Predicting Stochastic Defectivity from Intel’s EUV Resist Electron Scattering Model

Predicting Stochastic Defectivity from Intel’s EUV Resist Electron Scattering Model
by Fred Chen on 11-22-2023 at 6:00 am

Predicting Stochastic Defectivity from Intel's EUV Resist Electron Scattering Model

The release and scattering of photoelectrons and secondary electrons in EUV resists has often been glossed over in most studies in EUV lithography, despite being a fundamental factor in the image formation. Fortunately, Intel has provided us with a laboriously simulated electron release and scattering model, using the GEANT4… Read More


Arm Total Design Hints at Accelerating Multi-Die Activity

Arm Total Design Hints at Accelerating Multi-Die Activity
by Bernard Murphy on 11-02-2023 at 6:00 am

multi die

I confess I am reading tea leaves in this blog, but why not? Arm recently announced Arm Total Design, an expansion of their Compute Subsystems (CSS) offering which made me wonder about the motivation behind this direction. They have a lot of blue-chip partners lined up for this program yet only a general pointer to multi-die systems… Read More