From Space-Central to Space-Time Balanced - A Perspective for Moore’s Law 2.0 and A Holistic Paradigm for EmergenceA friend of SemiWiki published an article on…Read More
The RISC-V and Open-Source Functional Verification ChallengeMost of the RISC-V action at the end…Read More
Sarcina Democratizes 2.5D Package Design with Bump Pitch Transformers2.5D package design is rapidly finding its stride…Read More
Addressing Reliability and Safety of Power Modules for Electric VehiclesAs electric vehicles (EVs) gain widespread adoption, safety,…Read More
Extrapolating the trends from last 20 years to the next ten suggests that we will be implementing a trillion transistors or more by 2020. At 20nm, with the chip sizes touching billions of transistors, the age old problem of how to implement a design in the most efficient manner remains unanswered. … Read More
I started a forum discussion about running Schematic Capture and SPICE on an iPad back in January, since then I bought an iPad 3rd generation and tried out that app.
It was easy to visit the App store, find the Spicy Schematic Capture app, download and start learning how to use their schematic and SPICE circuit simulator.… Read More
The technical program for DAC 2012 has an exceptional quality of technical papers, panels, special sessions, WACI (Wild and Crazy Ideas), WIP (Work In Progress), full day tutorials and user-track. The program is tailored for researchers and developers focused on electronic design automation (EDA) and embedded systems and … Read More
As I mentioned in my previous blog “NVIDIA Claims TSMC 20nm will not Scale?” Jen-Hsun Huang is a very entertaining guy. I always listen to the NVIDIA conference calls because you never know what he will say next. Clearly he is a smart guy so you have to ask yourself why all the rhetoric?
In the Forbes article NVIDIA: Intel should let us… Read More
I first met Betty Pokerwinski of Qualcomm at LinkedIn in the group called IC Layout Designers. I post frequently on LinkedIn and a blog article on an EDA tool called Visual Design Diff from ClioSoft created quite a discussion, enough so that I contacted Betty to learn more about her IC layout group at Qualcomm.
Questions and Answers… Read More
Part I (here) looked at a bit of the history of scripting, makefiles and other approaches to more formally specify and institutionalize EDA design flows.
The most sophisticated tool I know that looks at this issue is RTDA’s FlowTracer.… Read More
As Apple begins to flood the market with a full line of mobile devices sporting 4G LTE communications capability, starting with the iPAD and soon to follow with Ivy Bridge based MAC Book Pros and then in the Fall with iPhone 5s, one has to ask will the carriers be able to keep pace in order for customers to have a satisfied user experience.… Read More
These days, the flows that are used to build semiconductor designs are rightly regarded as part of the intellectual property of the company that developed and used them.
But it didn’t always used to be that way.… Read More
Keynote #2 at SNUG 2012 was John Cornish, VP Marketing at ARM. Why they sent a marketing person to speak in front of 2,000+ engineers I do not know. To top that, next time they should send a sales person and do a real dog and pony show. To find out more about John I checked his LinkedIn profile which was bare. So enough about John, lets hit … Read More
SNUG Chairman John Busco opened the session with a few words about Aart de Geus, the silver anniversary of Synopsys, and some SNUG statistics. A whopping 2,500 people registered this year! Probably due to the Magma acquisition which is prominently displayed on “Welcome Magma Users” signs and on the flat screens which are everywhere.… Read More
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