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ASIC Prototyping: Dini Group and Tektronix

ASIC Prototyping: Dini Group and Tektronix
by Daniel Payne on 11-25-2012 at 7:00 pm

Collaboration in EDA is nothing new, however you may not be aware of how the Dini Group and Tektronix have worked together on an FPGA prototyping platform to address issues like debugging with full visibility across an entire multi-FPGA design. At SemiWiki we’ve blogged a couple of times so far about the new debug approach… Read More


Dear Santa, please bring technology that brings us together

Dear Santa, please bring technology that brings us together
by Don Dingee on 11-23-2012 at 2:12 pm

Dear Santa,
It has been many years since I have written you. I was taught never to ask anyone for anything for myself, that it is a presumptuous and selfish thing to do, so this is not for me. I know you are busy filling the wish lists of children everywhere, but wanted to take a moment to ask for your help for everyone.… Read More


CEVA also bid to acquire MIPS… ARM still staying quiet?

CEVA also bid to acquire MIPS… ARM still staying quiet?
by Eric Esteve on 11-23-2012 at 4:21 am

We have seen in a previous post that Imagination Technologies has proposed to buy MIPS, in fact “MIPS operating business and certain patent properties, as well as license rights to all of the remaining patent properties”. Translated into understandable language Imagination has offered $60M for MIPS Processor IP core portfolio,… Read More


Tanner EDA Tops 1,200 Active Customers!

Tanner EDA Tops 1,200 Active Customers!
by Daniel Nenni on 11-22-2012 at 8:33 pm

It is always nice to see when an EDA company grows organically, versus inorganically by acquiring friends and foes. It is also nice to see when an EDA company invests in the fabless semiconductor ecosystem because, as we know, we are all in this together.

Tanner EDA celebrated its 25th anniversary this year by adding 149 new customers… Read More


Introduction to FinFET Technology Part III

Introduction to FinFET Technology Part III
by Tom Dillinger on 11-21-2012 at 5:30 pm

The preceding two Semiwiki articles in this thread provided an overview to the FinFET structure and fabrication. The next three articles will discuss some of the unique modeling requirements and design constraints that FinFET’s introduce, compared to planar FET technology.

Due to the complexity of FinFET modeling – … Read More


Internet of Things, My Bluetooth Headset

Internet of Things, My Bluetooth Headset
by Daniel Payne on 11-20-2012 at 8:42 pm

A catchy phrase used by bloggers and journalists these days is “Internet of Things“, or IoT if you prefer acronyms. All of this is made possible by EDA tools in the hands of SoC designers to create useful products like my Jawbone ICON bluetooth headset. Tonight I discovered that I could customize my bluetooth headset… Read More


Apache on Signal Integrity

Apache on Signal Integrity
by Paul McLellan on 11-20-2012 at 1:09 pm

Matt Elmore has a two-part blog about the growing complexity of signal integrity analysis, both on the chip itself and the increasingly complex analysis required to make sure that signals (and power) get in and out of the chip from the board cleanly, especially to memory, which requires simultaneous analysis of chip-package-system… Read More


EDS Fair: Dateline Yohohama

EDS Fair: Dateline Yohohama
by Paul McLellan on 11-20-2012 at 12:22 pm

Electronic Design and Solutions Fair (EDSF) was held in Yokohama Japan from Wednesday to Friday last week. It was held at the Pacifico Hotel, somewhere I have stayed several times, not far from the Yokohama branch of Hard Rock Cafe and, what used to be at least, the biggest ferris-wheel in the world.

Atrenta was one of the many companies… Read More


How much SRAM proportion could be integrated in SoC at 20 nm and below?

How much SRAM proportion could be integrated in SoC at 20 nm and below?
by Eric Esteve on 11-20-2012 at 4:45 am

Once upon a time, ASIC designers were integrating memories in their design (using a memory compiler being part of the design tools provided by the ASIC vendor), then they had to make the memory observable, controllable… and start developing the test program for the function, not a very enthusiastic task (“AAAA” and “5555” and other… Read More