SemiWiki Outlook 2025 with yieldHUB Founder & CEO John O’DonnellWhat was the most exciting high point of…Read More
Powering the Future: How Engineered Substrates and Material Innovation Drive the Semiconductor RevolutionEngineered substrate technology is driving an evolution within…Read More
CEO Interview: Dr. Andreas Kuehlmann of CycuityDr. Andreas Kuehlmann, Executive Chairman and CEO at…Read More
The Double-Edged Sword of AI Processors: Batch Sizes, Token Rates, and the Hardware Hurdles in Large Language Model ProcessingUnlike traditional software programming, AI software modeling represents…Read More
TRNG for Automotive achieves ISO 26262 and ISO/SAE 21434 complianceThe security of a device or system depends…Read More
Formal verification methods are being adopted at a fast pace as a complement to traditional verification methods like functional simulation for IP blocks in SoC designs. I had a video meeting with Max Birtel, co-founder of LUBIS EDA and learned more about their history, products and vision. This company started recently in 2020… Read More
As usual in January we start with a look back at the papers we reviewed last year. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and lecturer at Stanford, EE292A) and I continue our series on research ideas. As always, feedback welcome.
These … Read More
Noise minimization is required for advanced analog and radiofrequency (RF) circuits. Unlike digital circuits, where noise is a second-order effect, system performance metrics such as signal-to-noise ratio (SNR), phase noise, timing jitter, and bit error rate (BER) are directly affected in analog and RF designs. Effective… Read More
In the early days of the PSS rollout, some verification engineers were suspicious. Just as they were beginning to get comfortable with UVM, here came yet another standard to add to their learning and complexity overhead. Then the fog started to clear; UVM is ideal for block-level testing whereas PSS is ideal for system level testing.… Read More
Predictions in technology adoption often hinge on a delicate balance between technical feasibility and market dynamics. While business considerations play a pivotal role, the technical category reasons for the success or failure of a prediction are more tangible and often easier to identify—if scrutinized with care. However,… Read More
A growing trend in system design is the use of multiple ICs mounted in advanced packages, especially in high-performance computing and AI. These modern packages now integrate multiple ICs, often with high-bandwidth memory (HBM), resulting in hundreds of thousands of connections that need proper verification. Traditional… Read More
The lifecycle for complex chip design includes many factors. Traditional systems focus on design tasks, associated schedules and manufacturing logistics. While these are important aspects of the project there is a lot more that can be measured, predicted and tracked. Taking a more holistic view of the project opens new opportunities… Read More
Dan is joined by SiLC Technologies CEO Mehdi Asghari. Mehdi is one of the early pioneers of the silicon photonics industry with over 25 years of commercialization experience in this space. SiLC is his third Silicon Photonics start-up focusing on advanced imaging solutions. His previous startups, Kotura and Bookham, both enabled… Read More
High-speed digital (HSD) designers have long tested the limits of realizable speed. GHz frequencies are now the norm, and multi-level signaling is pushing rates higher while the long-awaited transition to optical signaling and even higher rates looms ever closer. Power density is also climbing, and data-hungry applications… Read More
Dr Josep Montanyà is a Co-founder leading the company, with +18 years of experience in MEMS, patents and the semiconductor industry. Founded Baolab Microsystems prior to Nanusens.
Tell us a little bit about your company.
We have a patented technology that allows us to build chips with nano-mechanisms inside (called NEMS) using… Read More
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Unlocking the cloud: A new era for post-tapeout flow for semiconductor manufacturing