In the race to reduce verification time for ever growing sizes of SoCs, various techniques are being adopted at different levels in the design chain, functional verification being of utmost priority. In an analog-digital mixed design, which is the case with most of the SoCs, the Spice simulation of analog components is the limiting… Read More
Jitter: The Overlooked PDN Quality MetricBruce Caryl is a Product Specialist with Siemens EDA…Read More
CEO Interview with Vamshi Kothur, of Tuple TechnologiesIt was my pleasure to meet with Vamshi…Read More
Webinar – Power is the New Performance: Scaling Power & Performance for Next Generation SoCsWhat if you could reduce power and extend…Read More
Reachability in Analog and AMS. Innovation in VerificationCan a combination of learning-based surrogate models plus…Read More
Speeding up IP and Data Management
IP and Data Management (DM) for SoC teams has gradually moved from ad-hoc approaches using simple Excel spreadsheets, to home-grown software that is specific to a project or company, and finally to commercially supported tools. One such commercial toolset for IP lifecycle management is from Methodics, named ProjectIC –… Read More
Should we pay the price of Innovation?
I agree that this question sounds stupid: nobody is forcing me to buy an innovative product, or even a gadget, if I don’t want to pay a high price, I just don’t buy the product. But it seems that some people don’t really think that way. The story is related to Qualcomm sales in China, and recently announced partnership with SMIC…
The Partnership… Read More
IBM thinks neural nets in chip with 4K cores
Neural networks have been the darlings of researchers since the 1940s, but have eluded practical hardware implementations on all but a small scale, or an enormous one given how many processing elements and interconnects are needed. To make significant brain-like decisions, one needs at least several thousand fairly capable… Read More
Layout-aware Diagnosis
Traditional test methodologies have been based on the functional model, that is to say the netlist. The most well-known is probably the stuck-at model which grades a sequence of test vectors by whether they would have managed to notice the difference between a fully functional design and one where one of the signals was permanently… Read More
Who will Manufacture Apple’s Next SoC?
Just to review: The brain inside the current Apple iPhone 5s is the A7 SoC manufactured by Samsung using a 28nm process. The A6 (iPhone 5) and A5 (iPhone 4s) are based on Samsung 32nm. The rest of the Apple SoCs also used Samsung processes. I think we can all now agree that the coming Apple A8 SoC (iPhone 6) will use the TSMC 20nm process.… Read More
Hybrid Memory Cube and the Intel Knights Landing
While looking for information on a Xilinx Spartan 6 Project with DDR memory I came across a new type of DRAM called the Hybrid Memory Cube (HMC). The technology made me want to take a closer look:
The Hybrid Memory Cube is like a stack of DDR chips stacked die on die using through silicon vias to interconnect the dies the bottom die in not… Read More
What is the Latest in Mobile?
Most of the results are in for mobile for last quarter, plus the earnings calls are all over. The picture is not pretty. The big picture is that low-cost Android-based suppliers, primarily in Asia, are starting to eat a lot of market share from Samsung (#1) and Apple (#2). There were about 295M smartphones shipped in Q2, a measly 2% … Read More
Will Intel Have a Bigger FinFET Market Share Than TSMC in 2015?
Speculation is running rampant after last month’s conference call where Dr. Morris Chang, who is often referred to as “The Chairman”, commented that at 16nm TSMC will have a smaller market share than a major competitor in 2015. TSMC will however regain the FinFET lead in 2016 and 2017. Of course the blogosphere went crazy on this … Read More
CEVA actively preparing the future
I have recently blogged about CEVA acquisition of Riviera Waves, a very positive move to consolidate CEVA leading position of connectivity IP vendor (Bluetooth and WiFi). We know CEVA for years as being the leading supplier of DSP IP cores for the wireless phone market and it look like that we will have to rethink this definition,… Read More
Facing the Quantum Nature of EUV Lithography