More Headwinds - CHIPS Act Chop? - Chip Equip Re-Shore? Orders Canceled & Fab Delay- CHIPS Act more likely to be maimed…Read More
Next Generation of Systems Design at SiemensElectronic systems design is filled with a wide…Read More
Samtec Paves the Way to Scalable Architectures at the AI Hardware & Edge AI SummitAI is exploding everywhere. We’ve all seen the…Read More
Tier1 Eye on Expanding Role in Automotive AIThe unsettled realities of modern automotive markets (BEV/HEV,…Read More
As chip design complexity increases, integration scales expand and time-to-market pressures grow, as a result, design verification has become increasingly challenging. In multi-FPGA environments, the complexity of design debugging and verification further escalates, making it difficult for traditional debugging methods… Read More
The TSMC Open Innovation Platform (OIP) Ecosystem Forum has become the industry benchmark when it comes to showcasing industry-wide collaboration. The extreme design, integration and packaging demands presented by multi-die, chiplet-based design have raised the bar in terms of required collaboration across the entire … Read More
Dan is joined by Kevin Robinson, yieldHUB’s Vice President of operations and sales. With over 23 years of experience as a test engineer in the semiconductor industry, Kevin brings a wealth of knowledge and dedication to his dual role. At yieldHUB, Kevin leads both sales and operations teams, playing a crucial role in delivering… Read More
Mehdi is a serial entrepreneur with a track record of success. He is currently CEO and co-founder of SiLC. SiLC is his third Silicon Photonics start up focusing on advanced imaging solutions that enable machines to see like humans. His previous start up, Kotura where he was CTO and SVP of Engineering, developed communication solutions… Read More
Improve productivity by shifting left LVS
In modern semiconductor design, technology nodes continue to shrink and the complexity and size of circuits increase, making layout versus schematic (LVS) verification more challenging. One of the most critical errors designers encounter during LVS runs are shorted nets. Identifying… Read More
We‘re all aware of the challenges aging brings. I find the older I get, the more in touch I feel with those challenges. I still find it to be true that aging beats the alternative. I think most would agree. Human factors aside, I’d like to discuss the aging process as applied to the realm of semiconductor device physics. Here, as with… Read More
Arm has been making noise about running large language models (LLMs) on mobile platforms. At first glance that sounds wildly impractical, other than Arm acting as an intermediary between a phone and a cloud-based LLM. However Arm are partnered with Meta to run Llama 3.2 on-device or in the cloud, apparently seamlessly. Running… Read More
The outsourcing fabrication of ICs makes them vulnerable to hardware security threats. Security threats such as reverse engineering, insertion of hardware Trojan, and backside contact-less probing to steal cryptographic information can cause financial loss to IP owners and security risk to the system in which these ICs are… Read More
The semiconductor industry is experiencing rapid evolution, driven by the proliferation of IoT applications, image sensors, photonics, MEMS applications, 3DIC and other emerging technologies. This growth has dramatically increased the complexity of integrated circuit (IC) design. One aspect of this complexity is the … Read More
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